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Deepesh Mahawar

Associate Partner

Mumbai, Maharashtra, India8 yrs 10 mos experience
Highly Stable

Key Highlights

  • 6 years of experience in Quantitative Finance and automation.
  • Dual degree from IIT Bombay in Electrical Engineering and Microelectronics.
  • Proficient in advanced programming languages and HPC.
Stackforce AI infers this person is a Quantitative Finance professional with strong expertise in High Performance Computing.

Contact

Skills

Core Skills

Quantitative Analysis (finance)High Performance Computing (hpc)Machine Learning

Other Skills

CUDAMPIC++Gaussian EliminationNewton-RaphsonLU factorizationSpacetime Supercomputer Cray XC50MNA matrixFFTMotor Current Signature AnalysisLossless Data CompressionMPLAB SIMCPPCPU profilingVLSI

About

A goal oriented individual with demonstrated history of working in Quantitative Finance and automation for 6 years. Strong research professional with degree focused in Electrical Engineeeing (B.TECH) + Microelectronics(M.TECH) Dual Degree from IIT Bombay. Proficient in C++, Python, R, CUDA, MPI, Excel.Contact me at deepeshkumarmahawar@gmail.com, mobile 7738847950

Experience

8 yrs 10 mos
Total Experience
2 yrs 3 mos
Average Tenure
2 yrs 1 mo
Current Experience

Ubs

2 roles

Associate Director

Promoted

Jan 2025Present · 1 yr 3 mos · Mumbai, Maharashtra, India

Quant Analyst(Authorized Officer)

Mar 2024Feb 2025 · 11 mos · Mumbai, Maharashtra, India

Credit suisse

Quant Analyst(Exempt-Non Officer)

Mar 2020Feb 2024 · 3 yrs 11 mos · Mumbai, Maharashtra, India · On-site

Ee iit bombay

Research Scholar

Jan 2018Feb 2020 · 2 yrs 1 mo · Mumbai Area, India

  • D-latch circuit simulation is done using Modified Nodal Analysis and dynamic expressions obtained are evaluated over time using Newton-Raphson iterations.
  • In each iteration, the linear equations obtained are solved using Gaussian Elimination method.
  • After setting basic algorithm created variations in the circuit parameters of 10%(which occurs naturally during production) to study the effect on circuit behavior.
  • Simulated circuit on k40 GPU using Cuda parallelization and Cudastream to vary parameters parallely, performing a total of 40,00,000 simulations, thus obtained a speedup of 149.5 compared to CPU.
  • To further optimise used LU factorisation in symbolic form using SymPy to generate L and U factors of the MNA matrix in terms of node voltages.
  • Used Spacetime Supercomputer Cray XC50 system's Pascal GPU for further testing and got additional speedup of 6.7.
  • Implemented Cuda and MPI combined for further scaling the application on multiple nodes.
CUDAMPIC++Gaussian EliminationNewton-RaphsonLU factorization+4

Iit bombay

Graduate Teaching Assistant

Jul 2016Apr 2017 · 9 mos · MUMBAI

  • Introduction To MEMS (Micro Electro- Mechanical System)
  • Silicon Pressure sensors, Micromachining, MEMS Fabrication :Integrated Circuit Processes, Bulk Micromachining ,Physical Microsensors, Microactuators: Electromagnetic and Thermal microactuation.
  • Microelectronics Simulation Lab
  • Familiarization with TCAD software, CMOS structure design, Compact models and transistor-level circuit simulation.

Forbes marshall

Summer Internship | Analyst | everSENSE Remote Monitoring App

May 2015Jun 2015 · 1 mo · Pune Area, India

  • Tested and Integrated FFT algorithm with Eversense mobile app to monitor rotor and stator conditions in real time
  • Analysed signatures originated from different faulty motor parts by using Motor Current Signature Analysis
  • Implemented algorithm for Lossless Data Compression on VIBTRANS (dspPIC33F128G306) using MPLAB SIM
  • Impact: Improved Eversense user window data refresh time from 6 to minimum 1 sec
FFTMotor Current Signature AnalysisLossless Data CompressionMPLAB SIMMachine LearningQuantitative Analysis (Finance)

Creative concepts

Winter Internship | Asst. Embedded System Engineer - 'Automated Tea Maker'​

Dec 2014Dec 2014 · 0 mo · Vadodara Area, India

  • Modeled a Tea Maker using stepper motor, solenoid valve, 16x2 LCD, Hex keypad, hotplate, relay on AT89S52 Ultra Development Kit using 8051 Assembly language.
  • System can enroll individual preferences for quantity of each ingredients using their respective user IDs.

Education

Indian Institute of Technology, Bombay

Bachelor of Technology - BTech — ELECTRICAL ENGINEERING

Jan 2012Jan 2017

Indian Institute of Technology, Bombay

Master of Technology - MTech — Microelectronics

Jan 2012Jan 2017

Pragati School, Kota

XII

Jan 2011Jan 2012

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