Bilwakeshwar Ivaturi — Software Engineer

8+ years of experience in Static Timing Analysis (STA), synthesis, and physical design on 2nm to 14nm technodes Experience in Starrc extraction and timing methodology. Worked on test chips with advanced technologies, including Gate-All-Around (GAA) and backside metal stack. Strong expertise in DFT constraints analysis and resolution. Proficient in Timing ECO, using tools such as Tweaker and PrimeTime DMSA. Fluent in English, Telugu, Kannada and Hindi.

Stackforce AI infers this person is a VLSI design expert with a focus on timing analysis and physical design.

Location: Bengaluru, Karnataka, India

Experience: 8 yrs 11 mos