Nov 2022 – Feb 2024 · 1 yr 3 mos

• The role requires end to end responsibility of Debug domain for Intel server chips (Xeon). The domain includes debug features as Tracing, Run Control, CrashLog, At-Scale Debug, Closed Chassis and Open Chassis Debug interfaces for Intel Server platforms.

Jun 2019 – Nov 2022 · 3 yrs 5 mos

• The role requires end to end responsibility of Debug domain for Intel client chips (Intel Core i3/5/7/9). The domain includes debug features as Tracing, Run Control, CrashLog, Closed Chassis and Open Chassis Debug interfaces for Intel Client platforms.
• I am involved in defining the debug architecture, features and improvements in the debug solutions provided on Intel client platforms. I also contribute in defining the future roadmap of debug solution for continous technological improvement and competitiveness.
• My average day mostly include analyzing customer requiremetns, writing System Architecture specifications and alignment between various teams, which includes IP Architects, SOC Architects, Project management teams, ingredient teams, and validation teams for concept definition and feature implementation.

Jul 2012 – Jun 2019 · 6 yrs 11 mos

• The role requires end to end responsibility of given 3G/LTE/5G Modem SoC. Majorly worked on Tracing, Debugging, CoreDump/CrashLog and related features. Work includes providing the architectural concepts for new platforms, evaluate and provide optimum solution, its feasibility, identify risks and provide effort estimation. Guide the development team on the proposed solution and provide/review test concepts for the proposed solution.

Mar 2010 – Jul 2012 · 2 yrs 4 mos · Bangalore, India

• The role included managing serial communication (USB 2.0, UART) and Soft GPS across the Bluetooth products from the company. Provide support to product development teams, resolve issues, review solutions, new feature development and maintain the code across platforms.

Nov 2009 – Mar 2010 · 4 mos

• Assigned to do pre-silicon validation at client side for their Mobile Base Station chips. Involved in validating ARM11 core, MMU, Cache, Interrupts (VIC, PIC), TCM, AMBA bus, System DMA and PCIe.

Jan 2008 – Aug 2009 · 1 yr 7 mos · Hyderabad, Telangana, India

• I was assigned a Team Lead role to lead implementaiton of a Design Verification Framework (Tool) which can be used to develop and execture pre and post-silicon validation test cases. My role was to define the FW aspect to support the framework and guide the team to implement the features.

Sep 2002 – Jan 2008 · 5 yrs 4 mos

• The role mostly involved designing and developing device drivers for Analog Devices mobile SOCs. Was involved in developing drivers related to Clocking and Power Management, Cache, MMU, System Initialization and Reset, IO peripherals like SPI, UART, etc.
• I was also involved in developing a firmware based framework for Application development on the platform.