Narendra sv — Associate Consultant
I am passionate about validating and ensuring the performance and functionality of complex systems. With a strong background in multiple domains, I bring a holistic approach to my work, ensuring the highest quality results. Please feel free to connect with me to talk about potential collaborations or opportunities within the semiconductor and validation space. I am a seasoned professional in Pre-Silicon and Post-Silicon Validation of various IPs within SOCs. My career journey has been defined by testing methodologies, covering Sanity, Functional, System, Regression, Performance, and Stress testing. ✅ Mastery in utilizing FPGA-based emulation platforms for Pre-Silicon Validation. ✅ Proficiency in crafting meticulous test cases and comprehensive plans for diverse IPs. ✅ Deep understanding of WLAN standards – 802.11a/b/g/n/ac (Wi-Fi 6). ✅ Proficient in managing different protocols, including WLAN, IIC, SPI, SDHC, USB 3.0, and RTC. ✅ Expertise in ARMv7, ARMv8, and Intel x86 Architectures. ✅ Skilled in debugging tools like JTAG and GDB debugger. ✅ Adept at using configuration tools like GIT and build tools like CMake and Make files. ✅ Effective in debugging software using debuggers and trace files. ✅ Proficient in Bug Reporting and Tracking with JIRA and HSD. ✅ Expertise in C programming scripting, Embedded C, and Python scripting. ✅ Hands-on experience with IDEs like Keil µVision 4.0, 5.0, and Vim Editor. ✅ Proficient in operating systems such as Linux and Windows. ✅ Strong command of tools like Chip scope, Trace32, ISE design tool, and impact tool. ✅ Skilled in hardware event capture and reading using the QTF tool. ✅ Collaborative approach working with lab engineers and circuit/logic/system designers. ✅ Experienced in understanding specs, and hardware architecture, writing validation plans, and executing IP features at both the IP and system levels. ✅ Proficient in Board bring-up activities and Platform Validation. ✅ Well-versed in hardware analysis and schematic design review. ✅ Competent in embedded system programming and debugging using JTAG debuggers. My diverse project portfolio includes: 🔹 Core-Performance Validation on Intel SOCs: In-depth involvement in end-to-end performance testing, automation, and server performance analysis on Xeon processors. 🔹 Functional Validation of Wi-Fi Module on Qualcomm Snapdragon SOC: Proficiency in WLAN data traffic testing, ARM architecture, and collaboration with design engineers. 🔹 Functional Validation of USB 3.0 on SOC 🔹 Functional Validation of SD Host Controller on SOC
Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in performance testing and validation methodologies.
Location: Bengaluru, Karnataka, India
Experience: 11 yrs 5 mos
Skills
- Validation Protocol
- Embedded C
Career Highlights
- Expert in Pre-Silicon and Post-Silicon Validation.
- Proficient in WLAN standards and protocols.
- Strong background in performance testing methodologies.
Work Experience
Capgemini Engineering
Senior Consultant (2 yrs 5 mos)
Wafer Space - An ACL Digital Company
Member of Technical Staff (11 mos)
Tessolve
Post silicon validation engineer (1 yr 1 mo)
Intel Corporation
System Validation Engineer(contract) (1 yr 1 mo)
Cientra (An ISO 9001:2015 Company)
Member Of Technical Staff (1 yr 5 mos)
Qualcomm
Software Validation Engineer(contract) (1 yr 5 mos)
PerfectVIPs
Pre/Post silicon validation engineer (1 yr 8 mos)
Embedded technologies India Pvt Ltd
Senior Validation Engineer (5 yrs 4 mos)
Education
Engineer’s Degree at ACS College of Engineering, Bengaluru, India
Engineer’s Degree at Vasavi Jnanapeeta First Grade College, No.10, 2nd Main, Vijayanagar, Bangalore 40.
School at Royal High School