Kapil Bajaj

Software Engineer

Bengaluru, Karnataka, India19 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expert in RTL Design and SoC development.
  • Proven leadership in managing engineering teams.
  • Strong background in semiconductor design and verification.
Stackforce AI infers this person is a semiconductor design expert with strong RTL and SoC capabilities.

Contact

LinkedIn

Skills

Core Skills

Rtl Design

Other Skills

Team ManagementMemory Circuit DesignMemory DesignPhysical DesignDFTStatic Timing AnalysisVLSITimingASICSoCFunctional VerificationSystemVerilogVerilogCMOSEDA

About

Experienced Design Engineer and Team Lead with a demonstrated history of working in the semiconductors industry. Skilled in Data path design, mBIST, DFT, Custom Memory Design, Debugging, Functional Verification, Verilog, CMOS, and EDA. Strong engineering professional with a Master of Technology (M.Tech.) focused in Electronics design, VLSI from Indian Institute of Science.

Experience

19 yrs 9 mos
Total Experience
13 yrs 2 mos
Average Tenure
6 yrs 7 mos
Current Experience

Broadcom inc.

Principal Engineer

Oct 2019 – Present · 6 yrs 7 mos · Bengaluru Area, India

RTL Design

Intel corporation

2 roles

Datapath Lead, STO & Engineering Manager in BigCore

Promoted

Dec 2017 – Sep 2019 · 1 yr 9 mos

  • Designing for Intel core functional blocks, section timing convergence and team management.
RTL Design

Design Engineer

Jul 2006 – Dec 2017 · 11 yrs 5 mos

  • SoCs, Memory Circuit Designs and compilers
RTL Design

Education

Indian Institute of Science (IISc)

Master of Technology (M.Tech.)

Jan 2004 – Jan 2006

Kurukshetra University

B-Tech — Electronics and communication

Jan 1999 – Jan 2003

Stackforce found 100+ more professionals with Rtl Design

Explore similar profiles based on matching skills and experience

Anand Shanmugam S

Anand Shanmugam S

Manager - Hardware - Power Architecture & ASIC

at NVIDIA

Bengaluru, India14 yrs 9 mos exp
LowPower ArchitectureManagementVerificationProject ManagementRTL Design
Udit Kumar

Udit Kumar

Sr. Manager Silicon Design

at AMD

Noida, India21 yrs 8 mos exp
ASICFunctional Verification
SS

Sunil Sampannavar

ASIC Engineer

at Quest Global

Bengaluru, India6 mos exp
ASICFunctional Verification
Shashank Chaurasia

Shashank Chaurasia

Director Technical Marketing

at Logic Fruit Technologies

Gurugram, India14 yrs 11 mos exp
FPGATechnical Marketing
AM

Abhishek Mittal

Principal Engineer

at Broadcom

Bengaluru, India16 yrs 10 mos exp
VLSIASIC
Aditya Verma

Aditya Verma

Senior Lead Engineer

at Qualcomm

Bengaluru, India7 yrs 8 mos exp
Harshad Kulkarni

Harshad Kulkarni

Lead FPGA Design Engineer

at Baker Hughes

Pune, India9 yrs 7 mos exp
Aman Dhammani

Aman Dhammani

RTL Design

at Qualcomm

Mumbai, India2 yrs 10 mos exp