Pawan Nirpal

Software Engineer

Hyderabad, Telangana, India3 yrs 10 mos experience

AI EnabledAI ML Practitioner

Key Highlights

Expert in LLVM and performance engineering.
Proven track record in optimizing ARM architecture.
Strong focus on aligning technical excellence with business value.

Stackforce AI infers this person is a specialist in semiconductor and software development industries with a focus on performance optimization.

Contact

Skills

Core Skills

Arm ArchitectureLlvmCompilersCode OptimizationC++

Other Skills

Vectorizationx86 AssemblyPerformance analysisOptimizationHardware Software Co-OptimizationARM SVEPrompt EngineeringVersion ControlDeep Neural Networks (DNN)OpenMPHigh Performance Computing (HPC)Open-Source SoftwareOpenCVSystems ProgrammingMicroprocessors

About

• My early exposure to Computer Architecture and Microarchitecture sparked a lasting curiosity about how systems work at their core. That curiosity evolved into a passion for Computer Science, particularly in optimization, performance engineering, and compiler design areas where hardware awareness and algorithmic rigor meet. • I enjoy solving fundamental performance-critical problems and building systems that push efficiency and scalability. • Beyond the technical dimensions, I enjoy exploring products and technologies holistically understanding not just their engineering complexity but also their business implications and how they deliver tangible value to stakeholders. I believe that impactful engineering is rooted in both technical excellence and strategic vision, and I strive to align the two in my work.

Experience

3 yrs 10 mos

Total Experience

1 yr 7 mos

Average Tenure

7 mos

Current Experience

Qualcomm

Senior Software Engineer

Sep 2025 – Present · 8 mos · Hyderabad, Telangana, India · On-site

Diving deep into ARM architecture with a focus on cutting-edge vectorization technologies (SVE/SME) to optimize performance-critical workloads on Snapdragon mobile and compute platforms. Responsible for exploring architectural features, enabling compiler-based vectorization, and driving performance improvements across high-performance applications. Collaborating closely with teams to ensure efficient utilization of ARM’s scalable vector extensions for Snapdragon SoCs.

LLVMARM Architecture

Intel corporation

Compiler Engineer

May 2024 – Sep 2025 · 1 yr 4 mos · Bengaluru, Karnataka, India · On-site

Advanced the LLVM compiler journey through instruction selection, machine-dependent code generation frameworks (SelectionDAG, GlobalISel), register allocation algorithms, and microarchitectural performance cost modeling. Applied heuristics and performance analysis to optimize the x86 backend, leveraging Intel VTune for detailed codegen performance insights. Contributed to LLVM open-source development and backend enhancements.

CompilersCode optimization

Amd

System Software Engineer

Jul 2022 – May 2024 · 1 yr 10 mos · Bengaluru, Karnataka, India

Introduced to the LLVM compiler framework with a focus on performance analysis and machine-independent optimizations. Worked on inlining heuristics, cost modeling, and tuning optimization pipelines to improve compiler efficiency and application performance.

LLVMC++