Apr 2021 – Present · 5 yrs 1 mo

• Supported Commercialization of Multiple enabled profile on single SIM card
• Re-designing and development USIM driver code.
• Re-structuring and development of Hardware power control module.
• Developed design for Unified timer framework (multicore + legacy)
• Leading memory optimization, board bring-up activities.

Apr 2019 – Mar 2021 · 1 yr 11 mos

• Developed USIM T=1 communication protocol and contribution on fixing USIM driver issues.
• Developed unit test system for USIM module
• Contribution to backtrace logging, power management and CP linear mode development activity.
• Developed NV item flushing manager.

Apr 2018 – Mar 2019 · 11 mos

• Handling board bring-up from platform side, responsible for initial bootup sequence, device configurations and crash analysis.
• Contributed to inhouse RTOS development (multicore variant)
• Developed performance KPI framework for RTOS (single core and multi-core variant)
• Developed CMM Scripts for first level analysis of RTOS issue

Apr 2016 – Mar 2018 · 1 yr 11 mos

• Developed Timer firmware for Physical layer usage in modem system.
• Developed windows and ARM DS5 based platform solution for simulating modem code and testing with TTCN script.
• Redesigned and developed NV, Timer, AFC, profiler module for Slim-modem.
• Optimized scatter loading and saving RAM space for low end modem chipset.

Jul 2014 – Mar 2016 · 1 yr 8 mos

• Contributed in stabilization of RTOS code.
• Porting of DSP code to ARM architecture from Ceva DSP.
• Design and development for making one binary for all operators.
• Understanding and integrating file system code with modem code.