Krittish Ray Chaudhuri — Software Engineer

• VLSI Physical Design Engineer with strong expertise in end-to-end ASIC flow (Netlist to GDSII) across advanced nodes (FinFET) • Proficient in constraints development (SDC) and advanced Static Timing Analysis (STA): OCV, AOCV, MCMM, CRPR, driving efficient timing closure • Solid understanding of PPA (Power, Performance, Area) trade-offs and design optimization strategies • Working knowledge of low-power design methodologies (CLP/UPF) and Logical Equivalence Check (LEC) • Strong foundation in MOSFET and transistor-level concepts enabling deeper design insight • Skilled in Tcl and Perl scripting for automation, flow enhancement, and productivity improvement • Hands-on experience with industry-standard EDA tools: Synopsys PrimeTime, Cadence Tempus, Fusion Compiler (FC), and Genus • Comfortable working in Linux/Unix and Windows environments with exposure to HPC-based design flows Driven to deliver timing-closed, power-efficient, and high-performance silicon solutions for next-generation semiconductor and SoC designs.

Stackforce AI infers this person is a VLSI Physical Design Engineer with expertise in ASIC and Photonics industries.

Location: Bengaluru, Karnataka, India

Experience: 11 yrs 11 mos