Sathwik G.S

Software Engineer

Bangalore, Karnataka, India6 yrs 9 mos experience

Highly Stable

Key Highlights

Expert in VLSI architecture design and verification.
Proven track record in optimizing GPU designs.
Strong background in formal verification methodologies.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and GPU architecture.

Contact

Skills

Core Skills

Graphics Processing UnitDigital Hardware DesignFunctional VerificationUniversal Verification Methodology (uvm)Microcontroller ProgrammingAnalog Electronics

Other Skills

SystemVerilogFormal VerificationPower verificationApplication-Specific Integrated Circuits (ASIC)CC++VHDLImage ProcessingEmbedded SystemsMicrocontrollersDigital Image ProcessingverilogRTL DesignComputer VisionSignal Processing

About

I'm interested in designing domain-specific VLSI architectures. I have both academic research and industry exposure in working with ASICs. Experience in RTL design and verification of complex mobile SoCs. Validated system-level use cases for Qualcomm-Hexagon DSPs and Security IPs. I have a firm grasp of using SystemVerilog, UVM, and SVA - Formal Verification to develop scalable testbench architectures. Currently, I'm exploring RISC-V and related open-source tools to design and develop custom solutions to enable low-power hardware acceleration.

Experience

6 yrs 9 mos

Total Experience

6 yrs 9 mos

Average Tenure

6 yrs 9 mos

Current Experience

Qualcomm

5 roles

Senior Lead Engineer

Dec 2024 – Present · 1 yr 5 mos

Senior Engineer

Dec 2022 – Dec 2024 · 2 yrs

Design and uArch of Vertex Fetch Unit (Part of Geometry pipeline) of Qualcomm Adreno GPU
Performed static benchmark analysis to identify design bottlenecks and inefficiencies.
Improved area efficiency by 12% with no performance degradation.
Adopting formal verification methodologies for accelerated design prototype efforts.

Graphics Processing UnitDigital Hardware DesignSystemVerilog

Engineer

Promoted

Dec 2020 – Nov 2022 · 1 yr 11 mos

Led complete verification of WLAN-DSP subsystem and 5G Network Switches: RTL to GLS, including Power-Aware verification
Used formal verification methodologies to enable early bug findings
Developed scalable SV-UVM testbench environment at Subsystem and SoC hierarchies

Functional VerificationFormal VerificationPower verificationUniversal Verification Methodology (UVM)

Associate Engineer

Jul 2019 – Dec 2020 · 1 yr 5 mos

Verification of Mid-Tier Qualcomm Mobile SoCs
Handled Pre-silicon Verification of Qualcomm-Hexagon DSPs and Security IPs

Summer Intern

May 2018 – Jul 2018 · 2 mos · Bangalore

Developed MATLAB/Octave utilities to analyse reports generated by routers to understand the
spectral behaviour when different types signal sources are present in the same unlicensed spectrum
Updated driver code to incorporate changes which resulted in informative reports for better analysis
Generated visual aids to understand the properties of interference other than Wifi signals present in the same bandwidth

Indian institute of science (iisc)

Summer Internship

May 2017 – Jul 2017 · 2 mos · Bengaluru, Karnataka, India

The work involved development of "Vehicle Classifier", a device which classifies vehicle based on laser beam interruption. ( for more information visit http://ieeexplore.ieee.org/document/6490403/ ).
My task was to improve this device on certain areas, such as its working under bright sunlight, its ability to differentiate between two wheeled and four wheeled vehicles.
Major area of work:-
1) Microcontroller Programming
2) Analog Electronics -- a) RC filter circuits b) Feedback Circuits c) PWM based laser beams.