Angad Pattnaik

Software Engineer

Bengaluru, Karnataka, India5 yrs experience
Highly Stable

Key Highlights

  • Experienced in Universal Verification Methodology (UVM) and SystemVerilog.
  • Strong background in hardware design and verification.
  • Proficient in multiple programming languages including C++ and Python.
Stackforce AI infers this person is a Hardware Verification Engineer with expertise in advanced verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)Systemverilog

Other Skills

X86VirtualizationPCIeHardware Description LanguageComputer ArchitectureC++Python (Programming Language)Eagle CAD

Experience

5 yrs
Total Experience
3 yrs 6 mos
Average Tenure
1 yr 6 mos
Current Experience

Google

Design Verification Engineer

Dec 2024 – Present · 1 yr 6 mos · Bengaluru, Karnataka, India · On-site

X86VirtualizationUniversal Verification Methodology (UVM)PCIeSystemVerilogHardware Description Language+4

Intel corporation

IP Verification Engineer

Jun 2021 – Dec 2024 · 3 yrs 6 mos

SystemVerilogUniversal Verification Methodology (UVM)

Education

National Institute of Technology Rourkela

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2017 – Jan 2021

DAV Public School Unit-8

All India Senior School Certificate Examination (AISSCE) 2017 — Science

Jan 2015 – Jan 2017

DAV Public School Unit-8

Secondary School Certificate (SSC) Examination

Jan 2013 – Jan 2015