Suman Sekhar Jana

Software Engineer

Kolkata, West Bengal, India6 yrs 11 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in DDRPHY verification for low power applications.
Strong background in SystemVerilog and UVM methodologies.
Master's degree from prestigious IIT Kharagpur.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in low power design.

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Skills

Core Skills

Ddrphy VerificationSystem Verilog

Other Skills

VerilogUVMPower-Aware simulationsUPFC (Programming Language)ScriptingTest PlanningEngineeringVHDLVery-Large-Scale Integration (VLSI)Code CoverageLow PowerFunctional VerificationRTL CodingGate Level Simulation

About

Experienced Design Verification Engineer with a demonstrated history of working in the wireless industry. Skilled in UPF, Universal Verification Methodology (UVM), SystemVerilog, Application-Specific Integrated Circuits (ASIC), and RTL Coding. Strong engineering professional with a MTech - Master of Technology focused in Microelectronics & Vlsi from Indian Institute of Technology, Kharagpur.

Experience

6 yrs 11 mos

Total Experience

3 yrs 5 mos

Average Tenure

4 yrs 8 mos

Current Experience

Nvidia

2 roles

Senior Low Power Verification Engineer

Promoted

Jul 2022 – Present · 3 yrs 11 mos · India

Low Power Verification Engineer

Oct 2021 – Jul 2022 · 9 mos · India

Qualcomm

DDRPHY Design Verification Engineer

Jul 2019 – Oct 2021 · 2 yrs 3 mos · Bengaluru, Karnataka, India

DDRPHY Verification Engineer - Working on one of the latest generations of DDRPHY namely Gen4 which supports state-of-the art LPDDR5 protocol. DDRPHY is a Mixed-Signal IP and is designed for Low power applications. Have already done projects on Gen3 DDRPHY supporting LPDDR4 protocol. Well accustomed with the in depth knowledge of the Design in Verilog along with the System Verilog + UVM architecture involving writing test benches to verify the functionality of the design. Knowledge in Power-Aware simulations using UPF

DDRPHY VerificationVerilogSystem VerilogUVMPower-Aware simulationsUPF