BOMMINA BALA GIRI RAGHURAM — Co-Founder
Hello, my name is Bommina Bala Giri, and I'm from Vijayawada, Andhra Pradesh. I'm currently pursuing my final year of B.Tech in Electronics and Communication Engineering from the National Institute of Technology, Patna. I've chosen VLSI engineer , I've completed specialized coursework and training in Verilog, SystemVerilog, UVM, functional coverage, and assertion-based verification (SVA). I'm also familiar with standard bus protocols like AHB, AXI, and APB, and have applied this knowledge in several hands-on verification projects, including a FIFO verification , 4-bit adder, arithmetic logic unit, and a UART and APB protocol-based testbench
Stackforce AI infers this person is a VLSI verification engineer with a focus on semiconductor design and verification.
Location: Vijayawada, Andhra Pradesh, India
Experience: 0 mo
Career Highlights
- Specialized in VLSI verification methodologies.
- Hands-on experience with multiple verification projects.
- Strong foundation in digital design and protocols.
Education
Bachelor of Technology - BTech at National Institute of Technology , Patna