Sushant Dhonchak — Software Engineer
Experienced Verification IP Engineer with a demonstrated history of working in the development of Verification IPs for high-speed protocols (PCIE, CXL, UCIE, DFI-DDR, CCIX, JESD, UART). Skilled in Universal Verification Methodology (UVM) and SystemVerilog. Strong engineering professional with a Bachelor of Technology focused on Electronics and Communication Engineering from Delhi Technological University (formerly DCE)
Stackforce AI infers this person is a Semiconductor Verification Engineer specializing in high-speed protocol development.
Location: Delhi, India
Experience: 8 yrs 9 mos
Skills
- Verification Ip's
- Universal Verification Methodology (uvm)
- Design Verification
- Ip Verification
Career Highlights
- Expert in Verification IP development for high-speed protocols.
- Proficient in UVM and SystemVerilog methodologies.
- Strong background in Electronics and Communication Engineering.
Work Experience
Synopsys Inc
R&D Engineering, Senior Staff Engineer (1 mo)
R&D Engineering, Staff Engineer (1 yr 5 mos)
Senior R&D Engineer,II (1 mo)
Senior R&D Engineer, I (2 yrs 2 mos)
R & D Engineer, II (2 yrs 5 mos)
R & D Engineer, I (1 yr 10 mos)
Cadence
Principal Design Engineer (10 mos)
Defence Research and Development Organisation (DRDO)
Research intern at Solid State Physics Laboratory (SSPL) (1 mo)
Education
Bachelor of Technology at Delhi Technological University (Formerly DCE)
at Kendriya Vidyalaya