S

Surendra Tangudu

Software Engineer

Bengaluru, Karnataka, India4 yrs 2 mos experience
Highly Stable

Key Highlights

  • Expertise in DFT and ASIC design methodologies.
  • Proficient in Verilog and EDA tools.
  • Strong background in digital circuit design and debugging.
Stackforce AI infers this person is a DFT and ASIC design specialist in the semiconductor industry.

Contact

LinkedIn

Skills

Other Skills

VerilogDigital ElectronicsDebuggingApplication-Specific Integrated Circuits (ASIC)EDADFTAutomatic Test Pattern Generation (ATPG)MBISTBoundary ScanScan InsertionJoint Test Action Group (JTAG)Design Rule Checking (DRC)tcl scripttessent shellIntel Quartus Prime

Experience

4 yrs 2 mos
Total Experience
3 yrs 11 mos
Average Tenure
3 mos
Current Experience

Einfochips (an arrow company)

Senior Design Engineer

Mar 2026 – Present · 3 mos

Insemi technology services pvt. ltd.

3 roles

Design Engineer

Promoted

Dec 2023 – Mar 2026 · 2 yrs 3 mos

Associate Design Engineer

Promoted

Dec 2022 – Dec 2023 · 1 yr

Junior Engineer

Apr 2022 – Dec 2022 · 8 mos

Maven silicon

VLSI design & DFT Trainee

Sep 2021 – Apr 2022 · 7 mos · Bengaluru, Karnataka, India

Education

Avanthi Institute of Engineering Technology, Chirukupally(V), Bhogapuram(M), Near Tagarapuvalasa Bridge, PIN- 531 162 (CC-Q7)

b.tech — ece

Jan 2017 – Jan 2021

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