Basannagouda Reddy

Director of Engineering

San Francisco, California, United States23 yrs 2 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 21 years of experience in Engineering Program Management.
  • Led a team of ~20 engineers across multiple regions.
  • Holds 10 US Patents in semiconductor technology.
Stackforce AI infers this person is a Semiconductor Engineering expert with extensive experience in IP development and project management.

Contact

Skills

Other Skills

VerilogLVSDRCCharacterizationExtractionSchematicEDAInformation ExtractionCMOSSoCSimulationsASICSemiconductor IndustryLow-power DesignTesting

About

• Hardware professional with 21 years of experience in Engineering Program Management and Product Engineering/Management. • Currently responsible for Standard Cell library cell content, Circuit Design & Validation Methodology, Quality & Productivity and Project & Program Management. • Lead engineering organization of ~20 engineers spread over US, South Aisa, East Asia, and Southeast Asia. • Experience in foundry sponsored Logic Library IP development, customer engagement, requirements management, specification definition, product life cycle, support, and delivery. • Unique working experience with leading semiconductor foundries like TSMC, Intel, Samsung, GlobalFoundries, RAPIDUS and their latest process technology/nodes. • Standard cells IP design experience in Planar, FINFET, FDSOI and GAA technologies. • People and Functional Management with screening/hiring/training and mentoring experience. • Results oriented and experienced in working with cross-functional teams and lead task forces to solve critical product and costumer problems to deliver on schedule. • Unique experience of working closely with customers who builds the chips in the areas like Graphics, Networking, Cloud, Mobile, Automotive, Space, Bitcoin etc in defining the additional requirements and suggesting custom cells development to achieve their desired PPA and yield requirements. • US Permanent Resident and holds 10 US Patents.

Experience

23 yrs 2 mos
Total Experience
4 yrs 7 mos
Average Tenure
13 yrs 11 mos
Current Experience

Synopsys inc

8 roles

Director R&D

Promoted

Feb 2025Present · 1 yr 4 mos

Sr. Manager, R&D

Jul 2022Feb 2025 · 2 yrs 7 mos

Sr. Manager, R&D

Promoted

Jun 2021Jul 2022 · 1 yr 1 mo

Engineering Project Manager, Senior Staff

Jun 2020Jun 2021 · 1 yr

Project Engineering Manager, Staff

Nov 2017Jun 2020 · 2 yrs 7 mos

Staff Engineer

Jun 2016Jun 2020 · 4 yrs

Sr.R&D Engineer II

Jun 2014May 2016 · 1 yr 11 mos

Sr. R & D Engineer II

Jun 2012Jun 2014 · 2 yrs

  • Worked on circuit design in 16nm FinFET technology

Nxp semiconductors

2 roles

Sr.Technical Leader

Apr 2011Jun 2012 · 1 yr 2 mos

  • GPIO Circuit Design

Technical Leader

Apr 2007Mar 2011 · 3 yrs 11 mos

  • Project management
  • Development and validation of library IP(I/O and Std Cells)
  • Technical guidance and Customer support

Philips/nxp

Senior Design Engineer

Apr 2006Mar 2007 · 11 mos

  • Project management
  • Development and validation of library IP
  • Technical guidance and Customer support

Philips

2 roles

Design Engineer

Nov 2004Mar 2006 · 1 yr 4 mos

  • Development and validation of library IP

Project Trainee

Jan 2004Nov 2004 · 10 mos

  • Design high-level cache architecture with the goal of improving performance and low power computing.

Bharat electronics ltd

Graduate Trainee

Nov 2001Dec 2002 · 1 yr 1 mo

  • Designing and testing the radar video simulator

Education

Manipal Academy of Higher Education

MS — VLSI CAD

Jan 2002Jan 2004

BE — E & CE

Jan 1996Jan 2000

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