Manu Boddu — Software Engineer

I’ve built a strong foundation in RTL design and digital logic through both academics and hands-on projects. My work on low-power approximate 4-2 compressors and optimized FIR filters using modified Vedic multipliers demonstrates my ability to write efficient Verilog, understand datapath architecture, and balance performance with power in synthesis-ready designs.

Stackforce AI infers this person is a Low-Power Digital Design Engineer with expertise in RTL and Verilog.

Location: Hyderabad, Telangana, India

Experience: 8 mos