RAKESH M R

Software Engineer

Bengaluru, Karnataka, India2 yrs 4 mos experience
Highly Stable

Key Highlights

  • Enthusiastic about Analog Circuits design.
  • Strong foundation in VLSI domain.
  • Hands-on experience with Cadence Virtuoso.
Stackforce AI infers this person is a VLSI design engineer with a focus on analog circuits.

Contact

LinkedIn

Skills

Core Skills

Analog LayoutIntegrated Circuits (ic)

Other Skills

Electronic CircuitsPhase-Locked Loop (PLL)TransistorsSRAMCMOSEngineeringCircuitMemoryElectronics and communicationLayout Versus Schematic (LVS)Design Rule Checking (DRC)Cadence VirtuosoStandard Cellmemory layoutanalog circuit simulation

About

I'm Enthusiastic in Designing of Analog Circuits & Layout and also looking forward to a long-term career in VLSI Domain, contributing to the company growth and thereby ensuring personal growth within the organisation.

Experience

2 yrs 4 mos
Total Experience
2 yrs 4 mos
Average Tenure
2 yrs 4 mos
Current Experience

Synopsys inc

A&MS Layout design engineer

Feb 2024 – Present · 2 yrs 4 mos · Bengaluru, Karnataka, India · Hybrid

Electronic CircuitsIntegrated Circuits (IC)Phase-Locked Loop (PLL)TransistorsSRAMCMOS+9

Epitome circuits

Layout trainee

Feb 2023 – Feb 2024 · 1 yr · Bengaluru, Karnataka, India · Remote

memory layoutanalog circuit simulationAnalog LayoutIntegrated Circuits (IC)

Education

Visvesvaraya Technological University

Bachelor of Engineering - BE

Jan 2019 – Jan 2023

Stackforce found 100+ more professionals with Analog Layout & Integrated Circuits (ic)

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