Amarjeet Kumar

Software Engineer

Bengaluru, Karnataka, India4 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expert in high-performance C++ design and optimization.
  • Proven track record in EDA simulation and low-power verification.
  • Strong background in deep learning and image processing.
Stackforce AI infers this person is a C++ engineer specializing in EDA simulation and performance optimization.

Contact

Skills

Core Skills

C++Performance OptimizationLow-power VerificationDeep LearningTensorflow

Other Skills

Performance TuningLow-Power Feature DevelopmentSDCDebuggingSystemVerilogUPFCNNGANResNetLinuxDesign PatternsAlgorithmsPython (Programming Language)VerilogMachine Learning

About

C++ engineer with 4.5 years of experience building high-performance components for Synopsys VCS, a large-scale EDA simulation platform. My work spans Synopsys design constraints (SDC), low-power feature development, performance tuning, profiling, and automated test infrastructure. I focus on improving system behavior through efficient C++ design, deep debugging, and performance analysis. Experienced in complex constraint handling, low-power verification flows, and resolving production issues in large SoC designs. Comfortable working across the stack—from low-level C++ to testing frameworks—and skilled in using GenAI-assisted development to accelerate delivery. Open to high-impact engineering roles in performance-critical systems.

Experience

4 yrs 11 mos
Total Experience
4 yrs 11 mos
Average Tenure
4 yrs 11 mos
Current Experience

Synopsys inc

2 roles

Staff R&D Engineer

Promoted

Feb 2024Present · 2 yrs 4 mos · On-site

  • Designed and delivered high-performance SDC and low-power features in VCS, improving accuracy, robustness, and customer evaluation readiness. Led performance tuning and resolved critical production issues across complex SoC verification environments.
C++Performance TuningLow-Power Feature DevelopmentSDCDebuggingPerformance Optimization

R&D Engineer II(Software)

Jun 2021Jan 2024 · 2 yrs 7 mos · On-site

  • Developed VCS features in C++, implementing SystemVerilog/UPF support, improving stability, and resolving low-power verification issues in large SoC designs.
C++SystemVerilogUPFLow-Power Verification

Samsung india

Summer Intern

May 2020Jun 2020 · 1 mo · Remote

  • Developed deep-learning models in TensorFlow for DSLR-quality image enhancement, experimenting with CNN, GAN, and ResNet architectures.
TensorFlowDeep LearningCNNGANResNet

Education

Indian Institute of Technology, Kharagpur

Integrated M.Sc. — Mathematics and Computing

Jan 2016Jan 2021

Jawahar Navodaya Vidyalaya - JNV

12th — Science

Jan 2013Jan 2015

Jawahar Navodaya Vidyalaya - JNV

10th

Jan 2008Jan 2013

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