Shayan Ahmad

Software Engineer

Bengaluru, Karnataka, India4 yrs 1 mo experience

Most Likely To Switch

Key Highlights

Strong academic background with top scores.
Experience in advanced layout design for leading tech companies.
Recognized by Chief Minister for academic excellence.

Stackforce AI infers this person is a Layout Design Engineer in the semiconductor industry.

Contact

Skills

Core Skills

Layout DesignDesign Engineering

Other Skills

Floor PlansLayout Versus Schematic (LVS)LefCheckVERCInstance LVSChcellProduct DesignElectrical EngineeringDesign Rule Checking (DRC)ResearchCommunicationProblem SolvingLeadershipTeachingManagement

About

I scored 85% in highschool and 93%(PCM) in intermediate examination. Rewarded by Chief Minister. Completed Btech from Jamia Millia Islamia (2015-2019) with 8 CGPA in Electronics and Communication branch . Completed Mtech From IIT-Dhanbad (2019-2021). Experienced in lower node(2nm tsmc, intel 18A) as a Layout Design Engineer.

Experience

4 yrs 1 mo

Total Experience

2 yrs 2 mos

Average Tenure

4 yrs 1 mo

Current Experience

Broadcom

Memory Layout Engineer

Apr 2025 – Present · 1 yr 2 mos · Bengaluru, Karnataka, India

Qualcomm

Memory Layout Engineer

Aug 2024 – Mar 2025 · 7 mos · Bengaluru, Karnataka, India · On-site

Synopsys inc

Layout Design Engineer

Jul 2022 – Jul 2024 · 2 yrs · Greater Noida, Uttar Pradesh, India · On-site

Floor PlansLayout Versus Schematic (LVS)Layout DesignDesign Engineering

Zia semiconductor pvt ltd

Memory Layout Engineer 2

May 2022 – Present · 4 yrs 1 mo · Greater Noida

Design EngineeringLayout Design

Bharat electronics limited

Trainee

May 2018 – Jun 2018 · 1 mo · Ghaziabad, Uttar Pradesh, India

Basics of Digital Communication

Education

Indian Institute of Technology (Indian School of Mines), Dhanbad

Master of Technology - MTech — Communication and Signal Processing

Jul 2019 – May 2021

Jamia Millia Islamia

Bachelor of Technology - BTech — Electronics and communication

Aug 2015 – Jul 2019

Stackforce found 100+ more professionals with Layout Design & Design Engineering

Explore similar profiles based on matching skills and experience

Rajendra Prasad

R&D Engineering Director

at Synopsys Inc

Mountain View, United States27 yrs 2 mos exp

ManagementMachine LearningLeadershipCustomer EngagementPeople Management

Arabo Tovmasyan

Senior Member of Technical Staff

at Analog Port AM

Yerevan, Armenia9 yrs 4 mos exp

Prakash Mishra (प्रकाश मिश्रा)

Staff Engineer

at Synopsys Inc

Hyderabad, India7 yrs 11 mos exp

Analog Circuit DesignLow-power Design

Shubham Yadav

Senior Design Engineer

at Synopsys Inc

Bengaluru, India4 yrs 2 mos exp

Standard Cell Layout DesignPhysical DesignLayout Design

Akshay Kinake

Staff Signoff Application Engineer

at Synopsys Inc

Bengaluru, India3 yrs 11 mos exp

Full Chip timing signoffSMC 3DIC STATiming ClosurePerformance Optimization

Lovleen Arora

Principal Engineer, NAND SubSystem Device Engineering

at Western Digital

Bengaluru, India9 yrs exp

NAND Flash MemorySystem DesignProduct Development

Allen Nguyen

SOC Physical Design Engineer

at Synopsys Inc

Ho Chi Minh City, Vietnam5 yrs 3 mos exp

Physical DesignApplication-Specific Integrated Circuits (ASIC)

Ashutosh Rao

R&D Engineer

at Synopsys Inc

Bengaluru, India4 yrs 4 mos exp

Static Timing AnalysisCircuit DesignHardware Security