Minh Tran

Director of Engineering

Vietnam18 yrs 3 mos experience
Highly Stable

Key Highlights

  • Over 15 years of experience in Analog Mixed Signal IP development.
  • Led multiple successful design teams in high-tech environments.
  • Awarded Bronze prize for contributions in 2012.
Stackforce AI infers this person is a seasoned expert in Analog Mixed Signal IP development within the semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

Analog Circuit DesignDft

Other Skills

DebuggingVerilogLogic SynthesisFormal VerificationPerlTCLCadence VirtuosoSynopsys tools

About

- Graduated from the University of Technical Education in 2008. - 03/2008 - 08/2014: Worked at Renesas Design VietNam + 03/2008 - 12/2012 : MBIST developer + 12/2012 - 08/2014: Analog design engineer - 08/2014 - present: Working at eSilicon VietNam

Experience

18 yrs 3 mos
Total Experience
6 yrs 1 mo
Average Tenure
6 yrs
Current Experience

Synopsys inc

3 roles

Director

Promoted

May 2026 – Present · 1 mo · Ho Chi Minh City, Vietnam

Senior Manager

Promoted

Jan 2024 – May 2026 · 2 yrs 4 mos · Ho Chi Minh City, Vietnam

Manager

Jun 2020 – Jan 2024 · 3 yrs 7 mos · Ho Chi Minh City, Vietnam

Esilicon

DESIGN ENGINEER SENIOR.IP DEVELOPMENT

Aug 2014 – Jun 2020 · 5 yrs 10 mos · Vietnam

  • Aug 2014 - present:
  • . Design GPIO 28nm (layout)
  • . Silicon test analysis
  • . Design LVDS receiver (Design lead - circuit design, QC, QA)
Analog Circuit DesignDebuggingVerilog

Renesas design vietnam co., ltd.

Senior engineer

Mar 2008 – Aug 2014 · 6 yrs 5 mos

  • June 2008 - Dec 2012: leader of MBIST development team
  • . Project management.
  • . Design and verify MBIST IPs
  • . Design and verify utilities of MBIST platform.
  • . Build up automatic test env.
  • . Trainnew member.
  • . Improve MBIST insertion flow of ARM cores.
  • . User support.
  • . Win Bronze prize at Contribution award in 2012
  • Dec 2012 - Mar 2014: leader of DLL design team
  • . DLL Technical transfer in the first six month
  • . Circuit and layout design for DLL
  • Apr 2014 - Aug 2014: layout design for Low Power IPs

Education

University of Technical Education in Ho Chi Minh city

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