S

Sai Teja

Product Engineer

Hyderabad, Telangana, India2 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expert in System Verilog and UVM for functional verification.
  • Proficient in testbench development and debugging.
  • Strong analytical skills in coverage analysis.
Stackforce AI infers this person is a Design Verification Engineer specializing in hardware verification and testing methodologies.

Contact

LinkedIn

Skills

Other Skills

LinuxMATLABCircuit SimulatorsTest ScriptsFunctional TestingArduino IDEPython (Programming Language)LabVIEWRTL DesignVerilogField-Programmable Gate Arrays (FPGA)C (Programming Language)

About

Design Verification Engineer with expertise in System Verilog, UVM, and functional verification. Skilled in testbench development, debugging and coverage analysis.

Experience

2 yrs 11 mos
Total Experience
2 yrs 11 mos
Average Tenure
2 yrs 11 mos
Current Experience

Bosch global software technologies

2 roles

Associate Hardware Engineer

Jul 2023 – Present · 2 yrs 11 mos · Coimbatore, Tamil Nadu, India

Intern

Jan 2023 – May 2023 · 4 mos · Coimbatore, Tamil Nadu, India

Education

Amrita Vishwa Vidyapeetham

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jul 2019 – May 2023

Stackforce found 100+ more professionals with Linux & MATLAB

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