Andranik Avetisyan — Software Engineer
CAD/EDA engineer with 7+ years of experience in semiconductor design support, validation, and automation across analog/mixed-signal, memory, logic, and P&R-related flows. Currently working at Synopsys Armenia in the Logic Library BVR team, supporting standard cell library validation and release, including QA, debugging, release support, and automation development to improve flow quality and efficiency. Previously worked in CAD/CCS support and design flow development for multiple foundries and advanced technology nodes from 40nm to N2/N2P/N3/N4. Skilled in technical debugging, automation, cross-team collaboration, and engineering support using Python, Perl, and Shell.
Stackforce AI infers this person is a Semiconductor Design Engineer with a focus on EDA and automation.
Location: Yerevan, Yerevan, Armenia
Experience: 8 yrs 1 mo
Skills
- Automation
- Validation
Career Highlights
- 7+ years in semiconductor design support and automation
- Expertise in analog/mixed-signal and memory design flows
- Strong skills in debugging and cross-team collaboration
Work Experience
Synopsys Inc
R&D staff engineer (Logic library standard cells) (1 yr 4 mos)
R&D CAD staff engineer (1 yr)
R&D CAD Engineer, Senior1 (1 yr)
R&D CAD Engineer2 (2 yrs 3 mos)
R&D CAD Engineer1 (2 yrs 1 mo)
intern CAD (5 mos)
Education
Master's degree at Armenian State University