Feb 2023 – Present · 3 yrs 4 mos

• Conducted research on state-of-the-art cochlear implant speech processing algorithms (CIS, HDCIS, ACE, SPEAK), implemented golden-reference models in MATLAB, and translated into RTL designs in VHDL. Prototyped and validated real-time functionality on FPGA, demonstrating feasibility for enhanced speech intelligibility.
• Developed adaptive signal processing algorithms like noise cancellation on hearing aids improving speech intelligibility and sound quality.
• Delivered end-to-end signal processing solutions, encompassing research, model verification in Matlab, Rtl design in VHDL, FPGA validation, and preparation for ASIC integration.

Nov 2018 – Mar 2023 · 4 yrs 4 mos

• Designed and implemented a proof-of-concept Adaptive Feedback Cancellation algorithm with RTL coding in VHDL, including FPGA-based prototyping and verification for real-time performance evaluation.
• Designed and developed a proof-of-concept beamforming algorithm for hearing-aid applications.