Akilesh Kannan

Software Engineer

Bengaluru, Karnataka, India4 yrs experience

Key Highlights

  • Expertise in semiconductor verification and debugging.
  • Proven track record in optimizing performance for complex systems.
  • Strong foundation in communication and teamwork.
Stackforce AI infers this person is a Semiconductor Verification Engineer with strong debugging and performance optimization skills.

Contact

Skills

Core Skills

Bluespec SystemverilogDebuggingCommunication ProtocolsComputer NetworkingCoding TheoryLte

Other Skills

VerilogField-Programmable Gate Arrays (FPGA)Very-Large-Scale Integration (VLSI)Signal ProcessingOperating SystemsWiresharkC (Programming Language)Scripting4GPython (Programming Language)Information TheoryCommunicationAlgorithmsC++Arduino

About

I love working on all parts of the computer from the transistor to the operating system, and love the interplay between them. I am also a novice self-hoster and have a minimal homelab that I love to tinker on.

Experience

4 yrs
Total Experience
1 yr 7 mos
Average Tenure
10 mos
Current Experience

Nvidia

Verification Engineer

Aug 2025Present · 10 mos · Bengaluru, Karnataka, India · Hybrid

  • Platform Security Controller HW Team
  • Verified the second generation HW Root-of-Trust that goes into all of NVIDIA's products.

Ventana micro systems

Hardware Engineer

Jul 2023Aug 2025 · 2 yrs 1 mo · Bengaluru, Karnataka, India · Hybrid

  • PCL DV Team
  • RISC-V Vector Execution Unit:
  • Verified end-to-end functionality of a RISC-V vector execution unit (RVV 1.0 specification).
  • Found multiple bugs in RTL and checker as part of a 2-member team.
  • Developed UVM sequences for random and targeted instruction streams and directed assembly tests.
  • Collaborated with the performance team to identify bottlenecks and improved performance by optimizing instruction scheduling, and other microarchitectural optimizations.
  • RISC-V eTrace (Instruction Trace Encoder) Unit:
  • Verified end-to-end functionality of a RISC-V instruction trace encoder unit (RV eTrace v2.0 specification).
  • Identified bugs in RTL, enhanced existing DV checks and introduced further checks to ensure correct operation.
  • Collaborated with the SW team to bring up the trace decoder, identifying key misunderstandings between the RTL encoder and software decoder implementations, and closing the gap.
  • Contributed to coverage closure efforts for the module.
  • Clock Frequency Controller:
  • Verified the clock frequency controller used in DVFS.
  • Created and executed test plans to completion; built a model to simulate voltage variations to stress the DUT.
  • Verified the multi-clock domain logic and ensured comprehensive coverage analysis and coverage closure.
Bluespec SystemverilogDebuggingComputer NetworkingVerilogField-Programmable Gate Arrays (FPGA)Very-Large-Scale Integration (VLSI)+1

Indian institute of technology, madras

Graduate Teaching Assistant

Jul 2022May 2023 · 10 mos · Chennai, Tamil Nadu, India · On-site

  • Half-Time Teaching Assistant
  • EE5311: Digital IC Design — Prof. Janakiraman Viraraghavan
  • EE2703: Applied Programming Lab — Prof. Nitin Chandrachoodan
  • Was involved in evaluation of quizzes and assignments, creating assignment questions and holding office hours for students.

Texas instruments

Embedded Software Intern

May 2022Jul 2022 · 2 mos · Bengaluru, Karnataka, India · Remote

  • Automotive Radar Software Team
  • Worked on the Uniflash tool to add support for ethernet transfer of bootloaders and applications.
  • Reduced transfer times over 100x from existing methods.
  • Designed a simple protocol to reliably program multiple boards simultaneously through UDP over Ethernet.
  • Received a Pre-Placement Offer for exemplary performance during the internship.
Communication ProtocolsComputer NetworkingOperating SystemsWiresharkC (Programming Language)Debugging+1

Bigcat wireless pvt ltd

FPGA Intern

May 2020Jul 2020 · 2 mos · Tamil Nadu, India · Remote

  • Worked on channel coding techniques for LTE.
  • Implemented 3GPP-compliant Convolutional Encoding channel coding scheme, Turbo Encoding scheme and their corresponding decoders on FPGAs.
  • Built python models for the above channel coding and decoding schemes for simulation and verification of the designs.
Coding TheoryLTE4GPython (Programming Language)Information TheoryVerilog

Abhiyaan

Technical Team Member

Mar 2019Apr 2020 · 1 yr 1 mo · Centre for Innovation, IIT Madras

  • Designed, tested and fabricated a PCB that integrated with the pre-existing PCB to improve safety and reliability of the autonomous bot.
  • Programmed TM4C123G microcontroller to operate a motor driver by both remote control (using wireless joystick) and serial communication (with laptop).

Education

Indian Institute of Technology, Madras

B.Tech + M.Tech — Electrical Engineering

Jul 2018Jul 2023

Maharishi Vidya Mandir Senior Secondary School

Class 12 — Science

Jan 2016Jan 2018

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