Angad Kumar Baranwal

Product Engineer

Hyderabad, Telangana, India10 yrs experience

Highly Stable

Key Highlights

Extensive experience in electronic design automation solutions.
Proven track record in leading global social impact projects.
Strong background in Analog Design and Automotive Layout.

Stackforce AI infers this person is a Semiconductor and EDA expert with a focus on Analog Design and Global Project Management.

Contact

Skills

Core Skills

Analog DesignCustom Design SolutionsAnalog Layout DesignAutomotive DesignProduct ValidationQuality AssurancePublic RelationsMarketing Strategy

Other Skills

ASIC DesignAdvanced Digital DesignAdvanced Node PDK DevelopmentAgilityAutomotive Analog Layout MigrationCC Level SellingC++C-Suite SellingCMOS DesignChange ManagementCustomer Change Request ManagementDebuggingElectronicsEvent Promotion

About

An enthusiastic engineer with extensive cross functional and geographical experience in offering electronic design automation solutions to semiconductor and system companies. Proven track record of voluntarily developing, leading and managing global social impact projects across South Asia, Europe, Africa, and North America. Unreasonable passion to drive & accelerate the pace of innovation that make an impact on people at large and transform lives. An avid reader and a student of the art of practicing leadership. Interested in reading, thinking and theorizing about Technology, Economics and Human Psychology. I like great ideas, and people who believe in changing the world by design. I myself a dilettante in design, but am learning more everyday. Eager to be part of hungry and hardworking teams and organizations to continue breaking barriers and opening frontiers.

Experience

10 yrs

Total Experience

3 yrs 7 mos

Average Tenure

1 yr

Current Experience

Synopsys inc

Solutions Engineering - Staff

Jun 2025 – Present · 1 yr · Hyderabad, Telangana, India · On-site

Working on proliferation of Synopsys Custom Design Solutions through advanced Analog Design innovations that includes advanced node PDK development (including Tech File), and Analog Design Migration for Schematic and Layout.

Analog DesignCustom Design SolutionsAdvanced Node PDK DevelopmentSchematic and Layout Migration

Cadence design systems

4 roles

Lead Engineer | Analog Design Flow and Methodology

Promoted

Jun 2022 – Jun 2025 · 3 yrs · Noida, Uttar Pradesh, India

Worked with customers and CFTs in proliferation of the Next Generation Automotive Analog Layout Migration – responsible for analysis of placement, routing, parasitic, DRC, LVS, and FILL.
Knowledge of various layout techniques such as shielding, matching, proximity effects, LDE, Antenna, Latch-up, ESD…
Worked on Virtuoso Layout Suite L/XL/MXL (connectivity driven layout), with a strong focus on UX, stability, performance, and productivity.
Worked on proliferation of Cadence's "state of the art methodologies" such as Design Planning and Analysis (DPA) and CLE (Concurrent Layout Editing).
Have high level proficiency in handing of advanced process node technologies (N2, N3E, N3, N5, N7…), PDK, and devices (FinFET & GAAFET).
Have better understanding of parasitic optimization in layout, including EMIR.
Have better understating of Analog Layout Design Flow.
Worked with multiple stakeholders (product management, development, and customers) in driving early engagement for key customers to reduce the overall project time frames in the Software Development Life Cycle iterations.
Developed and implemented test methodologies and flows to improve Virtuoso product quality and performance, incorporating customer technologies and specifications and advanced nodes (N2, N3E, N3, N5, N7) features.
Worked on physical verification flow such as DRC/LVS/FILL - high proficiency with interpretation, debug, and understanding of results.
Have better understating and hands-on on Analog Layout Design Flow.
Experienced version control tools such DesignSync, SOS, VersIC, Perforce, and ICManage.
Collaborated on different fronts with cross geographical teams spanning across 4 continents based in US, Taiwan, UK, and France.

Automotive Analog Layout MigrationPlacement and Routing AnalysisParasitic OptimizationPhysical Verification FlowAnalog Layout DesignAutomotive Design

Product Engineer II

Jul 2019 – May 2023 · 3 yrs 10 mos · Noida, Uttar Pradesh, India

Product Engineering 1

Apr 2017 – Jun 2019 · 2 yrs 2 mos · Noida, Uttar Pradesh, India

Primarily responsible for the validation of Virtuoso Layout Suite (L/XL/EXL/Viewer) features & methodologies.
Worked with cross functional team in integrating customer specific cases to existing regression suite.
Maintained regression tests for regular test cycles to assure performance and QOR.
Validated and closed customer change request.
Developed & reviewed Virtuoso Layout Suite test plan.

Validation of Layout SuiteRegression TestingCustomer Change Request ManagementProduct ValidationQuality Assurance

Intern, Analog Layout Validation

Apr 2016 – Mar 2017 · 11 mos · Noida, Uttar Pradesh, India

Cadence pulse toastmasters club

Vice President Public Relations

Jul 2020 – Jun 2021 · 11 mos · Noida, Uttar Pradesh, India

As VPPR, I was responsible for coordinating an active public relations and publicity program in my club by establishing and maintaining lines of communication between the club and its members, as well as between the club and the public.
This role gave me immense opportunity to build relationships, generate goodwill, and enhance marketing/branding skills while promoting the club events, meetings, themes, achievements, and milestones among members and guests.

Public RelationsMarketingEvent PromotionMarketing Strategy