Balasubrahmanyam M — Director of Engineering
I am an Intel Director of Engineering and have been working at Intel India for past 20 years and worked in several areas of semiconductor development life cycle, including RTL design, IP verification, Simulation/Emulation development (Virtual Prototypes), Post Silicon validation, Pre and Post silicon FW/SW/System validation, System Bring up (Power on) and System Debug. most recently I have been leading the System Debug and firmware integration and Validation efforts for Intel Network and Edge Computing Business group. I have successfully 1. Led System Debug and FW integration team and delivered System bring up, System Debug support for 15+ CPU platforms for Edge computing business. 2. Led Virtual prototype and Pre-Si verification strategy and delivered full system simulation platforms (Virtual prototype) for 20+ Mobile baseband SoCs for Intel Communication Devices group 3. Led Post Silicon validation efforts for Mobile baseband SoCs and successfully brought up 12+ SoC platforms Over the course of my career at Intel I have pioneered Virtual prototype development and usage for pre-si FW/SW verification, Simulation architecture and built and managed several technical teams across multiple Geo locations and led four functional organisations (Post silicon validation, Virtual prototypes, System Debug, FW integration and Validation)
Stackforce AI infers this person is a Semiconductor Engineering expert with extensive experience in pre-silicon and post-silicon validation.
Location: Bengaluru, Karnataka, India
Experience: 24 yrs 3 mos
Skills
- System Debug
- Firmware Integration
- Virtual Prototypes
- Post Silicon Validation
Career Highlights
- 20 years of experience in semiconductor development.
- Led teams delivering solutions for 15+ CPU platforms.
- Pioneered Virtual prototype development for pre-silicon verification.
Work Experience
AMD
Sr Manager Silicon Design Engineering (1 yr 2 mos)
Intel Corporation
Director of Engineering - System Debug, System Modeling (6 yrs 2 mos)
Technical Architect & Senior Manager - Virtual Prototype Systems [Modem SoCs] (3 yrs 4 mos)
Intel Mobile Communications Pvt Ltd
Manager (6 yrs)
Infineon Technologies
Senior Design Engineer (2 yrs 11 mos)
Agere systems
Tech Lead (2 yrs 8 mos)
ST microelectronics
software engineer (1 yr)
Bharat Electronics
Member Research Staff (2 yrs 5 mos)
Education
ME at Birla Institute of Technology and Science, Pilani
Bachelor of Technology (B.Tech.) at N.B.K.R.Institute of Science & Technology (affiliated to S.V University)