Bich Thuy Nguyen

Software Engineer

Ho Chi Minh City, Vietnam6 yrs 9 mos experience
Highly Stable

Key Highlights

  • 5+ years of experience in memory layout design
  • Expertise in FinFET layout across multiple process technologies
  • Trained new layout engineers at Synopsys Inc
Stackforce AI infers this person is a Memory Layout Design Engineer with expertise in semiconductor technology.

Contact

LinkedIn

Skills

Core Skills

Layout Versus Schematic (lvs)Design Rule Checking (drc)

Other Skills

New Hire TrainingEMIRResCheckERC

About

Memory layout design engineer with 5+ years of experience and 20+ projects at Synopsys Inc.

Experience

6 yrs 9 mos
Total Experience
6 yrs 9 mos
Average Tenure
6 yrs 9 mos
Current Experience

Synopsys inc

3 roles

Senior Layout Designer

Promoted

Jan 2024 – Present · 2 yrs 5 mos · On-site

  • 1. Overview:
  • Experience in FinFET layout and some process technologies at 2nm, 3nm, 4nm, 5nm, 7nm, 12nm,
  • 14nm.
  • Experience in Memory Compilers with multiple options: TCAM, SRAM, ROM.
  • Experience in Custom Compiler, Synopsys ICV, Jira, MS Office.
  • Experience training new layout engineers.
  • 2. Leafcell-level Design:
  • Layout of Leafcells all blocks with minimuarea and good yield.
  • Verify LVS, ERC, DRC of Leafcells.
  • Balance and improve RC of critical signals.
  • 3. Top-level and QA Verifications:
  • Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics.
  • Debug LVS, ERC, DRC Instances.
  • Verify Abutment Check to ensure LVS and DRC of Instances in SOC level.
  • Debug Sanity, Pattern Matching.
  • Improve CapCheck, ResCheck, EM and IR Drop to ensure reliability of the Compilers.
New Hire TrainingEMIRLayout Versus Schematic (LVS)Design Rule Checking (DRC)

Layout Engineer II

Promoted

Oct 2021 – Jan 2024 · 2 yrs 3 mos · On-site

Layout Versus Schematic (LVS)Design Rule Checking (DRC)

Layout Design Engineer I

Sep 2019 – Oct 2021 · 2 yrs 1 mo · On-site

Layout Versus Schematic (LVS)Design Rule Checking (DRC)

Education

VNUHCM - University of Science

Jan 2015 – Jan 2019

Stackforce found 100+ more professionals with Layout Versus Schematic (lvs) & Design Rule Checking (drc)

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Bich Thuy Nguyen - Software Engineer | Stackforce