Gaurav Vashisht

Director of Engineering

Bengaluru, Karnataka, India17 yrs 10 mos experience

Key Highlights

Experienced in DFT and MBIST management at Intel.
Strong background in VLSI design and testing.
Proficient in multiple hardware description languages.

Stackforce AI infers this person is a VLSI Design Engineer with expertise in DFT and semiconductor technologies.

Contact

Skills

Core Skills

DftArchitectureSession Initiation Protocol (sip)Boundary Scan

Other Skills

MBISTTessentijtagssnJoint Test Action Group (JTAG)VerilogSystemVerilogSpyglassClockinghtapVLSIVHDLEmbedded SystemsShell ScriptingDigital Circuit Design

About

To work in an environment that inspires continual personal and professional development to fulfill my potential and aspirations and to apply my academic and technical knowledge in the best way to meet the requirements of organization

Experience

17 yrs 10 mos

Total Experience

2 yrs 2 mos

Average Tenure

2 yrs 2 mos

Current Experience

Intel corporation

2 roles

DFT RTL & MBIST Manager

Promoted

Apr 2024 – Present · 2 yrs 2 mos

DFTArchitectureMBISTTessentijtagssn+1

Lead DFT Design Engineer

Apr 2017 – May 2023 · 6 yrs 1 mo · Bengaluru Area, India

Lead DFT Design Engineer

Boundary ScanJoint Test Action Group (JTAG)DFTTessentVerilogSystemVerilog+5

Qualcomm

Staff Engineer

May 2023 – Apr 2024 · 11 mos · Noida, Uttar Pradesh, India · On-site

Staff Engineer at Qualcomm

Session Initiation Protocol (SIP)

Cadence design systems

Product Validation

Jul 2015 – Mar 2017 · 1 yr 8 mos · Noida, Uttar Pradesh, India

Worked in DFT/PV team and did testing for various features like Diagnostics/GUI.

C-dac, mohali

M.Tech VLSI Design

Jul 2013 – Jun 2015 · 1 yr 11 mos

Sbcms institute of technology

Assistant Professor

Sep 2012 – May 2013 · 8 mos · Punjab

Worked as an assistant professor in ECE department. Prime responsibilities handled were teaching technical subjects Basic Electronics, Networks and Transmission Lines, Microprocessors and Digital Electronics.