guruprasad karki

Software Engineer

Bengaluru, Karnataka, India18 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 9 years of experience in Analog/RF layout.
  • Expert in multiple technology nodes including 20nm and 40nm.
  • Currently a Senior Staff Engineer at Samsung India.
Stackforce AI infers this person is a Semiconductor Engineer with expertise in Analog and RF layout design.

Contact

Skills

Core Skills

AnalogPower ManagementRf

Other Skills

CommunicationRF layoutsPower management BlocksTechnologiesSemiconductorsCadence VirtuosoAutomationDRCMixed SignalCMOSVLSILVSPhysical DesignAnalog Circuit DesignASIC

About

9 Years experience in the field of Analog/RF layout, worked on various nodes technology like 20nm 40nm, 65nm and 130nm. Worked in TI RF/ Power management teams Currently working in Qualcomm for RF Layout Team

Experience

18 yrs
Total Experience
7 yrs 11 mos
Average Tenure
12 yrs 7 mos
Current Experience

Samsung electronics

Senior Staff Engineer

Jun 2018Present · 8 yrs · India

  • Working as Analog layout Engineer with Power Management Group at Samsung R&D Bangaluru
CommunicationAnalogPower Management

Sicon design technologies pvt. ltd.

2 roles

Sr Layout Engineer

Nov 2013Present · 12 yrs 7 mos

Communication

Senior Layout Engineer

Nov 2013Present · 12 yrs 7 mos

Communication

Altran

Senior Engineer

Sep 2013Present · 12 yrs 9 mos · Bengaluru Area, India

  • Working in Qualcomm RF/Analog layout team through Altran Technologies from Dec 2013.
  • Worked on RF layouts like RX and TX Chains, LNA, MIXER, BBF, Synthesizers
  • Power management Blocks LDO, BGR, MBIAS .
  • Worked on Technologies like 28nm, 20nm, 40nm 65nm.
CommunicationRF layoutsPower management BlocksTechnologiesAnalogRF

Qualcomm

2 roles

....

Jan 2013Jan 2014 · 1 yr

Communication

....

Jan 2013Jan 2014 · 1 yr

Communication

Sankalp semiconductor pvt ltd

2 roles

Layout Engineer

Jul 2008Nov 2013 · 5 yrs 4 mos

  • Worked for TI RFTC team for more than one year, worked on Tx Rx Filters, ADC's clock buffers.
  • Worked HPA team. worked on High performance digital and analog blocks
  • Worked in TI MCU team
  • Currently working in AMD for memory compiler team.
Communication

Analog Layout engineer

Jun 2008Nov 2012 · 4 yrs 5 mos

  • Working in Sankalp semiconductors as Analog layout engineer from last 4 years.
  • Executed layout of Modules in different teams of TI as contractor
Communication

Education

Visvesvaraya Technological University

BE — Electronics and communication

Jan 2004Jan 2008

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