Jun 2018 – Jan 2022 · 3 yrs 7 mos · Greater Hyderabad Area

Apr 2017 – May 2018 · 1 yr 1 mo

• 1. Automated Imposition using APPE for transactional printing
• The Imposition Process is responsible for combining pages of input graphical content onto surfaces whose dimensions are reflective of the physical output media.
• The default mechanism is non-automated (e.g. fully-specified) Imposition. Fully-specified imposition explicitly identifies all page content for each sheet imaged and references these pages by means of the order in which they are defined in the input RunList (Document) Resource.
• Automated imposition relies on template based approach to imposition and relies upon the full hierarchy structure of the document (as specified by the RunList (Document) and referenced Structured PDL data) to specify the page content to be imposed.
• Environment: C, C++, Visual Studio 12.0, Windows 7, APPE and CIP4 libraries
• Roles & Responsibilities:
• · Understanding/gathering functional requirement specifications
• · Converting specification into technical specification
• · High-level design(module level) and low-level (class level) design
• · Coding and unit testing
• · Updating status to stake holders
• 2. Versioning and Auto-Die for folding cartoons and labels segment
• Versioning application takes PDF (having layers/spots)and JDF (having layers/spots) as input and allow user to create different versions and die-cut by selecting/un-selecting layers or spots.
• This helps user to create a different versions of content PDF to target specific segment.
• Environment: C, C++, Visual Studio 12.0, Windows 7, APPE and CIP4 libraries
• Roles & Responsibilities:
• · Understanding/gathering functional requirement specifications
• · Converting specification into technical specification
• · High-level design(module level) and low-level (class level) design
• · Coding and unit testing
• · Helping QA team to come-up with test plans/test case review
• · Updating status to stake holders

Jan 2013 – Mar 2017 · 4 yrs 2 mos

• 1. Radius-Esko AE-Fiery DFE Integration
• EFI and Esko unified workflow targeted for digital printing of packaging using EFI's industry-leading Fiery DFE combined with Esko's industry-leading workflow automation platform.
• Commercial printers that want to offer folding carton or label printing to their customers using their digital presses will enjoy the benefits of this powerful solution: a simple and efficient method to get access to the best workflow in the industry without having to make a significant new investment in
• specialized software.
• The EFI - Esko integrations remove touchpoints from your pre-production workflow to accelerate activities and remove costs so that customer can work faster, more accurately, and increase margin on every job.
• Environment: C, C++, Visual Studio 12.0, Windows 7, PDFL Libraries
• Roles & Responsibilities:
• · Attended workshop with Esko to understand the requirements
• · Converting the requirements into technical specifications
• · Preparing environment for testing with the help of IS&T
• · Coding and unit testing
• · Updating status to stake holders
• 2. Integrating Metrix Imposition Tool with Fiery DFE
• Metrix is a planning and imposition softwate used for pre-press and it is recently acquired by EFI. We are working on integrating this tool with Fiery servers inorder to perform imposition related activities on Fiery Jobs.
• Environment: C, C++, Visual Studio 8.0, Windows 7, Adobe PDF Libraries
• Roles & Responsibilities:
• Responsible for following activities.
• · Exposing existing C++ Harmony API’s (which are used for communicating with Fiery Server) via JNI(Java native interface) for Metrix (which is written in Java)
• · Replace Metrix PDF rendering libraries with EFI PDF Rendering libraries
• · Using exisitng tile-server caching mechanism for rendering VDP jobs

Jun 2009 – Jan 2013 · 3 yrs 7 mos · Greater Hyderabad Area

• Project 1: Synopsys Stack Tracer
• Summary:
• Synopsys Stack Tracer is a part of re-usable component library which can be linked into an application to generate a stack trace in the case of an unexpected fatal termination.
• A stack trace can be very useful for debugging issues especially those that occur in a customer environment which cannot be reproduced in-house. The Synopsys Stack Tracer library provides a standardized implementation which can be easily integrated into products.
• Environment: C, C++, Perforce, LINUX, Solaris and AIX
• Roles & Responsibilities:
• · Responsible for Requirements gathering, Design, Code Construction , Unit & Integration testing and Deployment
• · Providing user guide documents for the user’s
• · Providing the support
• Project 2: Performance Tuning of IC Validator
• Summary:
• IC Validator is a signoff DRC/LVS tool that has been architected for in-design physical verification at leading-edge process nodes. It delivers excellent scalability for efficient utilization of available hardware, superior ease-of-use for the physical designer, and high programmability for easier runset development.
• Environment: C, C++, Google Profiler, Perforce, LINUX, Solaris and AIX
• Roles & Responsibilities:
• · Reduce run-time and memory consumption
• · Identify and Analyze the bottlenecks in the source code by using Profilers
• Project 3 : Data Structure Mis-allignment detector tool
• Skill Set : C++, Perl
• Summary: This tool is used to improve the memory foot print of the applications or products. It provides the list of the structures which are consuming more memory than it supposed to use. This information will help writing data structures in a better way and thus improving the performance.
• Project 4: Warning Analyzer
• Skill Set: C, C++, Perl
• Summary: Developed Warning Analyzer which provides
•  a folder wise tree view of the warnings
•  Shows the source files with the warning text inserted at the location where it occurs.

Apr 2005 – May 2009 · 4 yrs 1 mo · Greater Hyderabad Area

• Worked on Following Projects.
• Project 1: STLPORT4 migration
• Skill Set: C++, Solaris, Synmake
• Summary: Migration of EDA products from default STL implementation to STLPORT4 to achieve
•  Standard (ISO/IEC 14882) compliance;
•  Advanced techniques and optimizations for maximum efficiency;
•  Exception safety and thread safety;
•  Important extensions---hash tables, singly-linked list, rope;
•  Power debug mode---run time check of the correctness of iterators and containers usage.
• Project 2: Porting to AIX and Solaris from Linux:
• Skill Set: C, C++, AIX, GDB, DBX, TotalView; Sun Studio
• Summary: Ported EDA products(IC Validator, Hercules and NCX) to AIX and Solaris platforms from Linux. As part of this project, we performed
•  Scoping;
• Product/Software dependencies.
• Depending environment components.
• Test environment components.
•  Analysis;
• Identification of scope and objectives
• Examining the application architecture in more detail.
•  Porting
• Fixing build and linking issues.
•  Testing
• Running the ported application against a set of test cases.
• If bugs are found, they are fixed and the source recompiled.
• Testing process repeats until the application passes all testing requirements.
•  Support

Nov 2004 – Mar 2005 · 4 mos · Greater Hyderabad Area

• Worked on following project:
• Build System Migration (StarXT and IC Validator)
• Skill Set: C, C++, GMAKE, Makefiles
• Summary: Migrated Synopsys products from gmake based build systems to Synmake (which is
• synopsys internal build system tool, which has more capabilities). Achieved 100% regression pass rate and performance pass rate on all the platforms after migration. Improved the build times by 10x.