Jayarama Navada

CTO

Bengaluru, Karnataka, India17 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in ASIC and RTL design.
  • Proficient in Verilog and VHDL.
  • Strong debugging skills in complex systems.
Stackforce AI infers this person is a semiconductor design engineer with expertise in ASIC and RTL design.

Contact

LinkedIn

Skills

Core Skills

AsicRtl Design

Other Skills

VerilogDebuggingSoCVHDLModelSimARMTCL

Experience

17 yrs 6 mos
Total Experience
3 yrs 6 mos
Average Tenure
4 yrs 3 mos
Current Experience

Amd

Senior Member of Technical Staff

Mar 2022 – Present · 4 yrs 3 mos · Bengaluru, Karnataka, India · On-site

VerilogDebuggingASICSoCVHDLRTL Design+3

Intel corporation

Logic verification Engineer

Apr 2016 – Mar 2022 · 5 yrs 11 mos · Bengaluru, Karnataka, India · On-site

Mentor graphics

Senior Corporate Application Engineer

Dec 2012 – Mar 2016 · 3 yrs 3 mos · Bangalore

Renesas mobile corporation

Design Engineer

Dec 2010 – Nov 2012 · 1 yr 11 mos

Nokia

Design Engineer

Sep 2008 – Nov 2010 · 2 yrs 2 mos

Education

Visvesvaraya Technological University

M Tech — VLSI Design

Jan 2006 – Jan 2008