Feb 2024 – Jul 2025 · 1 yr 5 mos

• In my role as the Senior Director of Solutions Engineering at Synopsys Inc, I led a team of engineers in designing and developing cutting-edge SoC solutions for diverse market segments. By overseeing the entire SoC design lifecycle and collaborating with global customers and cross-functional teams, I successfully aligned design objectives and project timelines to achieve performance, quality, and cost goals.

Dec 2021 – Feb 2024 · 2 yrs 2 mos

• Led a team of 20+ engineers in designing and developing SoC solutions for IoT, Mobile, and HPC markets. Collaborated with global customers and cross-functional teams to align design objectives and project timelines.

Oct 2019 – Dec 2021 · 2 yrs 2 mos

• Led emulation support for Synopsys products at Qualcomm sites, establishing successful partnerships and product validation efforts:
• Oversaw comprehensive emulation support for Synopsys products.
• Established successful partnerships and product validation efforts for emulation products targeted at Qualcomm customer accounts.

Oct 2013 – Oct 2019 · 6 yrs

• Led a team of 12+ emulation engineers at Qualcomm sites in Bangalore and Chennai, providing comprehensive emulation support for Synopsys products. Managed customer accounts for Samsung, LG, and ZTE, offering tailored emulation support for Synopsys tools. Oversaw product validation efforts for emulation products specific to the Qualcomm customer account.

Feb 2012 – Sep 2013 · 1 yr 7 mos · Bangalore, India

• FPGA Emulation

May 2011 – Jan 2012 · 8 mos · Chennai/Bangalore, India

• FPGA Emulation and Chip Design Validation,, FPGA prototyping, Chip bringup, Test Escape analysis etc.

Jan 2011 – Jun 2011 · 5 mos · Indian Institute of Technology, Madras, Chennai

• Instructor of Embedded Systems course to PG students.

Apr 2010 – Apr 2011 · 1 yr

• FPGA Emulation and Chip Design Validation,, FPGA prototyping, Chip bringup, Test Escape analysis etc.

Apr 2007 – Mar 2010 · 2 yrs 11 mos

• FPGA Emulation and Chip Design Validation,, FPGA prototyping, Chip bringup, Test Escape analysis etc

Mar 2006 – Mar 2007 · 1 yr

• FPGA Emulation and Chip Design Validation,, FPGA prototyping, Chip bringup, Test Escape analysis etc

Jan 2004 – Mar 2006 · 2 yrs 2 mos

• FPGA Emulation and Chip Design Validation,, FPGA prototyping, Chip bringup, Test Escape analysis etc

Aug 2002 – Dec 2003 · 1 yr 4 mos

• Functional Vector Generation for ATE

Jan 2002 – Aug 2002 · 7 mos

• Chip Design Verification Engineer

Jan 2005 – Jan 2010 · 5 yrs · Chennai, India

• Ph.D. in the area of video processing and VLSI design