Kavya patel G S

Software Engineer

Bangalore, Karnataka, India5 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in Digital Circuit Design and VHDL.
  • Proficient in FPGA and ASIC development.
  • Strong background in test engineering and production readiness.
Stackforce AI infers this person is a Silicon Design Engineer with expertise in VLSI and FPGA technologies.

Contact

LinkedIn

Skills

Core Skills

Digital Circuit DesignVhdl

Other Skills

ModelSimProduction ReadinessObservationTest EngineeringAnsys ProductsField-Programmable Gate Arrays (FPGA)Hardware Description LanguageSystem on a Chip (SoC)Application-Specific Integrated Circuits (ASIC)Python (Programming Language)C (Programming Language)Microsoft ExcelVerilogUnixTCL

Experience

5 yrs 11 mos
Total Experience
2 yrs 11 mos
Average Tenure
3 yrs 11 mos
Current Experience

Amd

3 roles

Senior Silicon Design Engineer

Promoted

Dec 2024 – Present · 1 yr 6 mos

ModelSimProduction ReadinessObservationTest EngineeringAnsys ProductsDigital Circuit Design+11

Silicon Design Engineer 2

Jul 2022 – Dec 2024 · 2 yrs 5 mos

Digital Circuit DesignVHDL

Intern

Jul 2021 – Jul 2022 · 1 yr

Tata consultancy services

System Engineer

Aug 2018 – Aug 2020 · 2 yrs · Nagpur Area, India

Education

Amrita Vishwa Vidyapeetham

Master of Technology - MTech — VLSI Domain

Jan 2020 – Jan 2022

Bapuji Institute of Engineering & Technology, DAVANAGERE

Bachelor of Engineering

Jan 2014 – Jan 2018

Jawahar Navodaya Vidyalaya - JNV

Jun 2007 – Jun 2012

Stackforce found 100+ more professionals with Digital Circuit Design & Vhdl

Explore similar profiles based on matching skills and experience

Senthil Kumar Murugaiah

Senthil Kumar Murugaiah

Sr. Manager Silicon Design Engineering

at AMD

Hyderabad, India25 yrs 8 mos exp
Product ManagementEngineering Management
Sourav Sharma

Sourav Sharma

Member of Technical Staff

at Oracle

Greater Delhi, India7 yrs 8 mos exp
CC++JavaScriptREST APIs
Sushil Sirsat

Sushil Sirsat

Research Scholar

at Visvesvaraya National Institute of Technology

India12 yrs 7 mos exp
Analog Integrated Circuit DesignSignal Integrity
ABHINANDAN .

ABHINANDAN .

Analog Design Engineer (External)

at Synopsys Inc

Una, India2 yrs exp
Analog Circuit Design
Varun Kumar

Varun Kumar

Synthesis/STA Engineer (Contractor)

at AMD

Hyderabad, India1 yr 1 mo exp
Integrated Circuit DesignPhysical Design
Abhishek Khandelwal

Abhishek Khandelwal

Principal R&D Engineer

at Synopsys Inc

Noida, India16 yrs 5 mos exp
Neeraj Parmar

Neeraj Parmar

Intern

at AMD

Indore, India5 mos exp
Field-Programmable Gate Arrays (FPGA)
Vijayalaxmi Raddiyavar

Vijayalaxmi Raddiyavar

SRAM library validation

at Intel

Bengaluru, India4 yrs 6 mos exp
SRAMLibrary ValidationComponent DesignPDK ValidationSimulation