Jan 2016 – Present · 10 yrs 5 mos · Hyderabad Area, India

Aug 2015 – Jan 2016 · 5 mos · Hyderabad Area, India

• Contractor from Collabera.

Aug 2014 – Jul 2015 · 11 mos · Hyderabad Area, India

• Worked as Product Validation Intern in Memory Interface Generator (MIG) at Xilinx Inc.
• Assisted the team in developing and validating flows/methodologies and deploying the environment required for design and validation of MIG.
• Worked directly with the other global teams to gain full understanding of their issues and to deliver timely support and quality solutions.
• Primary contact for MIG Ultrascale Pin Rule DRC validation issues.
• Also worked on MIG validation test-case generation for regressions and GUI testing.
• Worked with UTF, RDI, SLV frameworks for regression runs.
• Worked with CRs and JIRA frameworks for CR triaging.
• Good Tcl/Shell scripting skills.
• Developed good debugging skills.
• Successfully developed MIG Ultrascale Pin Rule DRC validation automation framework using Tcl Scripting for all supported controllers (DDR4, DDR3, QDRIIPlus, and RLD3).
• Successfully developed MIG Ultrascale Custom part validation automation framework using Tcl Scripting for all supported controllers (DDR4, DDR3, QDRIIPlus, and RLD3).