Kratika Bansal — Product Engineer
Completed a Master’s in VLSI Design at Malaviya National Institute of Technology Jaipur while gaining hands-on experience in advanced semiconductor design. Recently contributed as an ASIC Engineering Intern at NVIDIA, focusing on complete physical design flows for multiple 5nm technology node partitions. Skilled in physical design processes, including placement, routing, and sign-off checks such as LVS and DRC. Proficient with tools like Synopsys ICC2, ICV, Cadence Innovus, and Calibre. Actively seeking opportunities to apply technical expertise and drive innovation in VLSI engineering and physical design.
Stackforce AI infers this person is a Semiconductor Engineering professional with expertise in ASIC design and physical design processes.
Experience: 1 yr 10 mos
Skills
- Physical Design
- Static Timing Analysis
- Asic Engineering
Career Highlights
- Master's in VLSI Design with hands-on semiconductor experience.
- Internship at NVIDIA focusing on 5nm technology node.
- Proficient in advanced physical design tools and methodologies.
Work Experience
MediaTek
Physical Design Engineer (9 mos)
NVIDIA
ASIC Engineering - Intern(Physical Design) (11 mos)
Capgemini
Software Engineer (1 yr 1 mo)
VASAUTOMATIONS
Embedded Systems Trainee (2 mos)
Education
Master of Technology - MTech at Malaviya National Institute of Technology Jaipur
Bachelor of Technology - BTech at Swami Keshwanand Inst. Of Tech. Mgt. & Gramothan,Jaipur
Higher Secondary at H.G. International School
Secondary at St. Anselm's Sr. Sec. School
