Kshitij Kumar

Software Engineer

Hyderabad, Telangana, India15 yrs 2 mos experience

Highly Stable

Key Highlights

Proven expertise in Linux kernel development.
Strong background in embedded systems and firmware.
Recognized for optimizing system performance and security.

Stackforce AI infers this person is a highly skilled Embedded Systems Engineer with extensive experience in Networking and Telecommunications.

Contact

Skills

Core Skills

Linux KernelNetwork Software DevelopmentSystem Software DevelopmentBoot OptimizationPost-silicon ValidationSystem ValidationEmbedded SystemsFirmware DevelopmentBoard Bring-up

Other Skills

Linux kernel driveruser-space applicationepoll supportvfio-pci drivereventfd signalingMSI-X interruptscore reset featurecollaborationboot-time optimizationSystem-Level Validation FrameworkPython AutomationMiddleware code developmentEvaluation Board DesignFeature ValidationDebugging

About

A proficient cloud software development engineer with experience in system software development, driver design, and hardware-software integration for leading technology companies. Skilled in leading feature development, Linux kernel development, optimizing system performance, and addressing security vulnerabilities, with a strong track record of recognized achievements.

Experience

15 yrs 2 mos

Total Experience

2 yrs 9 mos

Average Tenure

1 yr 4 mos

Current Experience

Qualcomm

Staff Engineer

Feb 2025 – Present · 1 yr 4 mos

Intel corporation

Network Software Engineer

Mar 2021 – Feb 2025 · 3 yrs 11 mos · Bangalore Urban, Karnataka, India · Hybrid

Developed and led multiple features for Intel IPU product line.
Designed and developed epoll support for virtual functions using vfio-pci driver,
eventfd signaling, and MSI-X interrupts.
Led core reset feature development for IPU’s lookaside crypto engine by assisting
driver modifications and shared library implementations using vfio, eventfd
signaling mechanism and hardware interrupts.
Developed Linux kernel driver and user-space application for MACsec IP via
netlink framework.
Collaborated with multiple teams like application test team and SoC design
verification team to resolve multiple bugs.

Linux kernel driveruser-space applicationepoll supportvfio-pci drivereventfd signalingMSI-X interrupts+4

Cisco

Engineer III

Feb 2018 – Mar 2021 · 3 yrs 1 mo · Bengaluru Area, India

System software development for catalyst 9000 switches
Boot-time optimisation program for catalyst 9000 switches

system software developmentboot-time optimizationSystem Software DevelopmentBoot Optimization

Ericsson

Senior Software Engineer

Dec 2015 – Feb 2018 · 2 yrs 2 mos · Bengaluru Area, India

Post-Silicon Validation for Network Processor
System-Level (ROUTER) Validation Framework Development
Multi-processor, Multi Threaded Environment
SCAPY Traffic Generator based framework.
Python Automation using Unit Test Framework.
Worked on COREDUMP and MEMORY subsystem extensively.
Middleware code development
using HAL Framework for ASIC and SDK validation.
using Negative and Potential Bug Detection Technique.
Debug of critical customer issues.

Post-Silicon ValidationSystem-Level Validation FrameworkPython AutomationMiddleware code developmentSystem Validation

Marvell semiconductor

Systems Engineer

Dec 2012 – Nov 2015 · 2 yrs 11 mos · Bengaluru Area, India

AUDIO-VIDEO DOMAIN
Evaluation Board Design
Evaluation Board Bring-up
Feature Validation of Audio-Video Front-End Chips
Development of Code and Scripts in C-Language.
LAB Validation using Pattern Generators and Oscilloscope's
Release Firmware code Development
Debug of Customer Issues
NETWORKING DOMAIN
Post Silicon Validation of Marvell's Network Search Engine Chipset
Development of Code and Scripts in C-Language.
Lab Validation using Traffic Generators and Oscilloscopes
SUB-20 Microcontroller Middleware code Development
MDIO protocol drivers
SPI Protocol Drivers
JTAG protocol implementation using GPIO Bit-Banging
Wrapper VC++ Console Application.
SERDES Characterization
EYE-DIAGRAM optimization for High-Speed SERDES Lanes.

Evaluation Board DesignFeature ValidationFirmware DevelopmentDebuggingEmbedded Systems

Analinear technologies pvt. ltd

Design Engineer

Mar 2011 – Dec 2012 · 1 yr 9 mos · Hyderabad Area, India

Gained exposure to various TI ARM-based Development Boards : Beagleboard, Craneboard
Experienced Embedded System Design
CPU selection
Power Management
Peripheral optimized design for dedicated application
Experienced Board Bring-up
Power, Reset, Clock Management Subsystem
Customized U-BOOT Bootloader and Linux 2.6 Kernel for peripheral initialization.
Gained experience in CROSS-COMPILATION using ARM-toolchain.
built custom images for TARGET with source code modifications.
Bootloader
Modified PINMUX for Dedicated system design
Modified Boot-sequence for Development and Release phases.
Kernel
Modified existing device drivers for target peripherals.
Debugged some common kernel issues like: Kernel Panic etc.
RTOS
Worked on various RTOS Filesystems like Angstrom, TI
modified init.rc services and wrote simple applications to toggle GPIO's
Standalone Peripheral Testing
Some peripherals were tested in standalone mode to measure functionality and performance.