Madhavadas MV — Software Engineer
Currently working in ARM SoC level power estimation and modelling methodologies team. Previously worked in Nxp, Intel, Qualcomm SoC design teams, specialized in Low Power design and power estimation. M.Tech in VLSI and Embedded Systems. Skilled in: Unified Power format, UPF, IEEE 1801 PtPx Primepower, Conformal Low Power CLP, VCStatic Low Power VCLP, IEEE 2416, Clock Tree Power Analysis, Power Gating, Clock Gating, Dynamic and Leakage Power optimization
Stackforce AI infers this person is a Low Power Design Engineer with expertise in SoC power estimation methodologies.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 7 mos
Skills
- Low-power Design
- Power Estimation
- Soc Design
Career Highlights
- Expert in Low Power Design methodologies.
- Proficient in power estimation and modeling.
- Strong background in VLSI and Embedded Systems.
Work Experience
Arm
Staff Engineer (4 mos)
NXP Semiconductors
SoC Low Power Design Engineer (3 yrs 1 mo)
Intel Corporation
SoC Design Engineer (1 yr 10 mos)
Qualcomm
Senior Engineer (2 yrs 4 mos)
Engineer (2 yrs 3 mos)
Broadcom Limited
Intern (10 mos)
Education
Master of Technology (M.Tech.) at Model Engineering College
Bachelor of Technology (B.Tech.) at College of Engineering, Vadakara
