P

Pavan Kalyan K V

Software Engineer

Hyderabad, Telangana, India8 yrs 11 mos experience
Highly Stable

Key Highlights

  • Experienced in Layout Verification and Design Rule Checking.
  • Proficient in Schematic Editing and LVS.
  • Currently a Staff Layout Engineer at Synopsys Inc.
Stackforce AI infers this person is a Layout Engineering expert in the Semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

Layout VerificationDesign Rule Checking (drc)

Other Skills

Schematic EditorLvsLayout Versus Schematic (LVS)DrcAntennaElectro migrationIR dropVercMatchingResCheck

Experience

8 yrs 11 mos
Total Experience
8 yrs 11 mos
Average Tenure
8 yrs 11 mos
Current Experience

Synopsys inc

2 roles

Layout design staff engineer

Promoted

Feb 2025 – Present · 1 yr 4 mos · Hyderabad, Telangana, India · Hybrid

Layout VerificationSchematic EditorLvsLayout Versus Schematic (LVS)Design Rule Checking (DRC)Drc+6

AMS Layout Engineer, senior

Jul 2017 – Feb 2025 · 7 yrs 7 mos · Hyderabad, Telangana, India · Hybrid

Layout VerificationSchematic Editor

Education

KL University

Bachelor of Technology - BTech

Jun 2013 – May 2017

Kakinada institute of technology and science , divili

Master of Technology - MTech — Electronics

Jul 2024 – Present

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