Pawan Kumar

Co-Founder

Mumbai, Maharashtra, India5 yrs 9 mos experience

Key Highlights

Guided over 2000 students in competitive exams
Student achieved All India Rank 33 in JEE Main 2022
Expert in Mathematics and Physics education

Stackforce AI infers this person is a skilled educator specializing in STEM subjects with a focus on competitive exam preparation.

Contact

Skills

Core Skills

TeachingMentoringMathematicsContent DevelopmentSubject Matter ExpertiseEntrepreneurshipHardware DesignResearchCircuit Design

Other Skills

PhysicsEngineering MathematicsSignal & SystemsElectronics DevicesAnalog SystemsDigital ElectronicsVLSIElectromagnetic TheoryControl SystemsPCB DesignR.F. circuit designVLSI DesignFilter DesignMatlabCadence

About

I am free lance professional in teaching field and as a mentor from 2009 onwards.currently I guide the students who are preparing for IIT JEE Main / Advanced and NEET. This year (2022) I am happy to announce that one of my student secured ALL INDIA RANK 33 in JEE Main 2022 . In Mathematics she secured 99.996 percentile. I enjoy teaching thats y i am in this field . i guide Mathematics and Physics, I guided more than 2000 students of various fields like IIT JEE Main/Advanced, NEET, MSc( Electronics) , B.Tech ( Electrical , Electronics, Instruments design, Engineering Mathematics.) For any querry or suggestion or guidance you can contact me . Thanks .

Experience

5 yrs 9 mos

Total Experience

1 yr 3 mos

Average Tenure

Current Experience

Vidyasagar learning pvt ltd

HOD Mathematics

Nov 2016 – Dec 2018 · 2 yrs 1 mo · Mumbai, Maharashtra, India

Mathematics

Plancess edusolutions

Subject Matter Expert

Jul 2015 – Apr 2016 · 9 mos · Mumbai, India

Content Developer for GATE / CAT / IIT-JEE (MAIN-ADVANCE).
Area specialized- Engineering Mathematics,Network, Signal & Systems,Electronics Devices, Analog Systems, Digital Electronics,VLSI, Electromagnetic Theory and Antenna, microwave Theory and Circuits, Material Science (Electronics), Control Systems, Communication System (Analog + Digital) and relevant subjects related to Electrical and Electronics.

Engineering MathematicsSignal & SystemsElectronics DevicesAnalog SystemsDigital ElectronicsVLSI+4

Wissen institute

Co-founder

Jan 2013 – Jul 2015 · 2 yrs 6 mos · meerut (U.P.)

Entrepreneurship

Vlsi design tools and technology

Research Assistant

Dec 2011 – Jun 2012 · 6 mos

o Undertaken the Design of Inductors for R.F. circuit, Multiphase oscillator (Hardware), High Precession Programmable
Attenuator (Hardware), PCB Design under the guidance Dr. Shouribrata Chatterjee.
Industrial Training: An Innovative design of CDMA rejection filter using micro-strip technology,

PCB DesignR.F. circuit designHardware Design

Indian institute of technology, delhi

Senior research fellow

Dec 2011 – May 2012 · 5 mos · New Delhi Area, India

I am working as senior research fellow in IIT Delhi under Prof. Sauri Chatarjee. My area interest is VLSI design.

VLSI DesignResearch

Education

Faculty (Mathematics and Physics) for JEE MAIN/ADVANCED and NEET

May 2011 – Present · 15 yrs 1 mo · Mumbai, Maharashtra, India

MathematicsPhysicsTeachingMentoring

Kenstal communications pvt ltd

Trainee

May 2009 – Jul 2009 · 2 mos

The required filter is characterised by a very sharp cut-off frequency on one side, very low insertion loss and very
low VSWR.
o Designed a cascade trisection filter. In this one more coupling is induced between the resonators which induced the
pole near the cut-off frequency.
o Achievement: Design was accepted and significant reduction in production time and the cost of production. Drastic
reduction in the size of filter.
PROJECTS
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