Qinkai Fan

Software Engineer

San Francisco, California, United States6 yrs 8 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in distributed storage systems and OS kernel development.
Significant contributions to vSAN and Enclave-OS projects.
Proven ability to optimize system performance and integrity.

Stackforce AI infers this person is a Backend-heavy Infrastructure Engineer with expertise in distributed systems and operating systems.

Contact

fanqinkai23@gmail.com LinkedIn

Skills

Core Skills

Distributed Storage SystemKernel DevelopmentOperating Systems Design

Other Skills

AlgorithmsAvalanche Tolerance TestingC (Programming Language)C++C/C++Computer ArchitectureData ProtectionData StructuresDeduplicationDigital DesignsDockerEnclave-OSFile SystemFile System Consistency CheckFile Systems

About

Software Engineer with a demonstrated history of working on distributed storage system and OS kernel development.

Experience

6 yrs 8 mos

Total Experience

3 yrs 4 mos

Average Tenure

6 yrs

Current Experience

Vmware

2 roles

Senior Member Of Technical Staff

Promoted

Aug 2022 – Present · 3 yrs 10 mos · Palo Alto, California, United States

vSAN Express Storage Architecture (ESA) core datapath - native snapshot, storage space management and report, data protection and snapshot integrity, global async deduplication, vSAN object liveness control, on-disk format metadata dump tool, file system consistency check (fsck), vSAN OSA to ESA upgrade IO path and data migration

vSANStorage Space ManagementData ProtectionDeduplicationFile System Consistency CheckDistributed Storage System+1

Member Of Technical Staff III

Jun 2020 – Aug 2022 · 2 yrs 2 mos · Palo Alto, California, United States

vSAN - distributed storage system, kernel storage system, file system, file service

Distributed Storage SystemKernel Storage SystemFile SystemKernel Development

Fortanix

Software Engineer

Jul 2019 – Mar 2020 · 8 mos · Mountain View, California, United States

I worked as a member of Enclave-OS team and contributed to our customized operating system of Enclave, supported by Intel Software Guard Extension(SGX). My major work includes:
Checkpointing/Resuming: Migrated parent process’s context to the memory of newly forked child process, resolved address dependency of the linearly stored context and restored the context at child side using child process’s memory. This resulted in an average of 47% less memory usage of parent Enclave-OS process when testing on common commercial applications and allowed larger guest applications which are more space-consuming to run in Enclaves.
Filesystem Integrity: Implemented and extended features of filesystem integrity protection of Enclave-OS; used root-to-leaf hash model to generate checksum of Enclave-OS filesystem; integrated an open source filesystem benchmark tool IOzone as a docker container app into Enclave-OS to monitor performance of the filesystem. Optimized performance of the filesystem and resulted in 233% more random read/write speed.
Signals: Implemented multiple signal system calls of Enclave-OS; added unit tests of existing signal system calls, verified their behavior against Linux kernel and fixed them when they behaved differently.
Python Test Suites: Integrated test automation of Python-Numpy, Python-Pandas and Python-Scipy as docker container apps into Enclave-OS test suite; implemented infrastructure to process results of those python tests, which were generated by Pytest; used them as demonstration to show customers the capability of Enclave-OS to run large Python applications.

Enclave-OSIntel Software Guard ExtensionFilesystem IntegrityPython Test AutomationOperating Systems DesignKernel Development

Institute of microelectronics of chinese academy of sciences

2 roles

Research Assistant and Test Controller

Promoted

Feb 2016 – May 2016 · 3 mos · Beijing City, China

Researched in theory of avalanche tolerance test of power MOSFET at ampere stage and its effect on reliability of VDMOS
Set different test conditions for different samples and acquired their avalanche tolerance (drain-source voltage) with equipment ITC55300 and TESEC3702
Verified the reliability of samples with theoretical statistics, analyzed damage of avalanche test to samples and selected passing samples(not damaged)
Optimized device's working conditions according to samples' test results

Avalanche Tolerance TestingReliability Analysis

Research Assistant and Test Assistant

May 2015 – Jun 2015 · 1 mo · Beijing City, China

Worked jointly to test the threshold parameter of chips and devices, such as Schmidt inverter, power transistor and verified them with standards
Researched in switching feature of MOSFET based on simulated characteristic curve under Linux system, and verified it with practical results in laboratory

Threshold Parameter TestingMOSFET Switching Feature Research