Rameez Khan

Software Engineer

Bengaluru, Karnataka, India6 yrs 11 mos experience

Highly Stable

Key Highlights

7+ years in post-silicon validation.
Expertise in High Speed SERDES IPs up to 112Gbps.
Proven track record in silicon bringups and firmware development.

Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in high-speed data interfaces.

Contact

Skills

Core Skills

Silicon ValidationFirmware

Other Skills

I2CLabVIEWFPGAlow speedsgmiiAnalog Circuit DesignSerDeshigh speed serdesdigital rtlEthernetPCIeSoftware DevelopmentInstrumentationVerification and Validation (V&V)STS

About

7+ years' experience in post-silicon validation with strong expertise on High Speed SERDES IPs like Ethernet, PON, PCIe with rates upto 112Gbps and Low speed IPs. Successfully executed multiple silicon bringups with deep knowledge on Firmware, Digital RTL and Analog circuitry.

Experience

6 yrs 11 mos

Total Experience

2 yrs 5 mos

Average Tenure

2 yrs 1 mo

Current Experience

Synopsys inc

ASIC Digital Deisgn Sr Engineer

May 2024 – Present · 2 yrs 1 mo · Bengaluru · On-site

High-Speed SerDes Firmware and Digital Validation Engineer with hands-on experience in Synopsys 112Gbps PHY IP and deep working knowledge of IEEE 802.3 (Ethernet, PON), and PCIe Gen 5/6, supporting NRZ & PAM4 rates upto 400GKR4 across channel losses upto 32 dB.

Silicon ValidationFirmware

Nxp semiconductors

Validation Design Engineer (On contract)

Apr 2023 – Jun 2024 · 1 yr 2 mos · Bengaluru · On-site

Post-silicon validation engineer in the Interface team, validating analog and functional parameters of multiple IPs on a Smart-RADAR Automotive SoC product line. Characterized low/medium-speed protocols (GPIO, I2C, SPI, JTAG, QSPI) and high-speed interfaces (SGMII up to 1 Gbps) across full PVT corners using Instruments like AWG, SMU, Oscilloscope, Network Analyzer, JBERT, Protocol Analyzer, and Protocol Exerciser.

Silicon ValidationI2C

Soliton technologies

3 roles

Senior Project Engineer

Promoted

Jul 2021 – Mar 2023 · 1 yr 8 mos

Developed FPGA firmware for high-speed data converter capture and generation cards, supporting validation and customer characterization of Texas Instruments ADC, DAC, and AFE products. Developed, debugged, and deployed ATE production-test measurement code on the NI STS T2 platform — using NI TestStand Semiconductor Module (TSM) and LabVIEW — for analog MEMS microphone product lines, scaling test programs from 7-site to 49-site multi-site configurations.

Silicon ValidationLabVIEW