Nov 2022 – Jan 2025 · 2 yrs 2 mos · Bengaluru, Karnataka, India

• I am part of the Microservice Platform Team, where I work on optimizing the scale and performance of our MSP product. I work on enhancing the observability and monitoring features of the product, which help us to proactively identify and troubleshoot issues before they affect our customers. This involves using various tools and techniques to collect and analyze metrics, logs, and traces. Overall, my goal is to ensure that our MSP product is reliable, scalable, and performs at the highest level possible.

Apr 2018 – Jul 2021 · 3 yrs 3 mos · Bengaluru Area, India

• Implementing micro-service platform using kubernetes for scale-up/out cloud control plane. Support for different cloud/hypervisors (all leading hypervisor/cloud-platform).

Jul 2021 – Nov 2022 · 1 yr 4 mos · Bengaluru, Karnataka, India

• Building SaaS/microservices platform for managing cloud-based database.
• Designed/Implemented central logging framework based on ELK (Replaced Logstash with homegrown solution to scale client connections)
• Designed/Implemented central metric service using prometheus and M3DB (for real-time alert and grafana based dasboards)
• Designed/implemented activity logging/audit trail/event service using rabbitMQ/Mongodb.
• Adopted contract-first development approach, created tools using openapi to generate web stack for go-fiber, java-spring, dao layer generation, pytest based QA framework generation.
• Designed/implemented websocket based control-data plane communication channel including features self upgrade, remote command execution and key based authN/authZ.
• Design web app (plain javascript) for quality index dashboards integrated with QA framework for automatic report generation very similar to zephyer/xray.

Jul 2021 – Jun 2022 · 11 mos · Bangalore Urban, Karnataka, India

Apr 2016 – Apr 2018 · 2 yrs · Bangalore

• At ZeroStack, built and maintaining single click workload migrations from VMWare cloud to ZeroStack cloud. This is a complex and involved process, deal with multiple OSes, offline drivers injection, efficient disk blob fetch, on the fly disk format conversion.
• https://www.zerostack.com/resources/videos/vmware-to-zerostack-migration/
• built and maintaining single click workload migrations from AWS cloud to ZeroStack cloud.
• https://www.zerostack.com/resources/videos/instant-migration-from-aws-to-zerostack/
• Built and maintaining single click migration of workloads from Hyper-V to Zerostack.
• Windows ISO to bootable image conversion
• o Using autounattend answer file to automate windows ISO conversion.
• o c# based tool to program firewall, WinRM, RDP in the final image and also extend c: in deployed VM.
• Heat Template for Cloudera Hadoop.
• o Single click ready to consume Cloudera Hadoop deployment through Cloudera Manager APIs (v15).
• LDAP integration with keystone.
• o LDAP based login to OpenStack cloud.
• Session expire and single login session using redis and keystone.
• o Implemented idle session timeout using redis TTL.
• Bug fixes to KVM hypervisor and Nova packages
• OS-brick based cinder volume host mapper tool (Kilo/Liberty/Mitaka)
• Enhancements to cinder lvm driver for performance.

Sep 2015 – Apr 2016 · 7 mos · Bengaluru, Karnataka, India

• Working on NOVA component of OpenStack. Optimizing Hypervisor(KVM) for performance and security.

Jan 2015 – Sep 2015 · 8 mos · Bangalore

• Bare Metal Hypervisor for ARM/ARM64.

May 2014 – Jan 2015 · 8 mos · Bangalore

• Bare Metal Hypervisor for x86

Apr 2013 – May 2014 · 1 yr 1 mo

• a) Added hypmode support to uboot for AXM5516 (16 a15 core SoC)
• b) Optimized IO queues by eliminating memory barriers with address/control dependencies.
• c) Working virtualization of IO queues on ARM using KVM/Qemu.
• d) Created packages for Linaro/ARM ODP support on AXM5516
• e) Designed and implemented zero copy virtual network infra-structure for east-west traffic using ACP technology. ACP device plugged into a PCIe slot of x86 server (VT-x and VT-d capable), is used as virtualization platform.
• f) Live migration of VMs using vxlan in fastpath for AXM5516
• Merits: 900Kpps with 1.2% CPU load.
• Recipient of Green Spark Level2

Jul 2011 – Apr 2013 · 1 yr 9 mos

• Responsible for Linux device driver development for PCIe based CPP(Content Processor) devices.
• Provide design/solution on virtualization of these PCIe card.
• IOMMU
• Virtual Queues
• Provide solution to customer issues
• Recipient of two blue level4 spark

Jun 2010 – Jun 2011 · 1 yr

• Currently developing software package (LTTng/FTrace integration, less-intrusive tracing framework) for System Trace cell module(STM). Demonstrate proof of concept by porting LTTng to dump trace on STM instead of system memory, this was presented at Arm Technical conference 2010.
• Design and desmonstrate System MMU software stack to elite customers' include TI, Microsoft, Apple. System MMU core library would be integrated with Hypervisior, Linux kernel DMA-mapping APIs. System MMU is a hardware solution on ARM to virtualize IO/Devices (Similar to Intel VT/AMD Virtualization extensions). Currently I am about to complete a tool to generate register access code, to create access logic for SMMU registers. At this position, I am also doing line management of team of 4 engineers.

Oct 2007 – Jun 2010 · 2 yrs 8 mos

• Designed inter-processor communication protocol such as MessageQ, RingIO, FrameQ and data streaming for various SoCs. Developed device drivers on DSP/BIOSTM and Linux for various preipherals such as PCI, VLYNQ, Mailbox, HW Spinlocks. Developed unit test cases for the developed protocols. All designs were made to have a high performance by writing code with branch prediction and programming methodology (robust and design by contract).
• Designed & showcased usermode callbacks (http://sourceforge.net/projects/umcallbacks/) from Linux kernel. Every time a process is brought in by the CPU, a callback is executed and then execution is continued from the actaul resume point without going into kernel again.
• Developed and Design a small OS for TI C64+ DSP (http://sourceforge.net/projects/tic64dspos)
• Developed device driver and simulation model for HOST filesystem access on TI SoC/CPU simulators. Doen mainly to avoid large ramdisk file and also to cut down the iteration times. Filed two patents (Current status: provisional) on the HOST filesystem and block device access.
• Ported uIP and LWIP TCP/IP stack on TI DSPs on TI Simulators. EMAC simulation was done using pcap libraries. New TI Simulators (Open sourced) would have these EMACs models based on my initial work.
• Designed synchronized shared memory over ethernet, communicaton transport was written at ethernel frame level (Similar to RDMA protocol). Allows higher level protocols like MSG, RingIO, etc. to work seamless for discrete CPUs.
• Helped TI in achieving CMMI-3 level certification with quality work and documentation.

Jul 2004 – Jul 2007 · 3 yrs

• Designed inter-processor communication protocol such as MessageQ, RingIO, FrameQ and data streaming for various SoCs conatining a GPP and TI DSP. Developed device drivers on DSP/BIOSTM and Linux for various preipherals such as PCI, VLYNQ, Mailbox, HW Spinlocks. Developed unit test cases for the developed protocols.
• All designs were made to have a high performance by writing code with branch prediction and programming methodology.

Jul 2007 – Oct 2007 · 3 mos

• Worked on Pseudo-random test case generation for testing IO paths and IO devices connected to the Montalvo's x86 based processor.

Jan 2003 – Jul 2004 · 1 yr 6 mos

• Ported GNU toolchains for DRDO's ABACUS (32bit RISC processors). Designed & Debeloped ABI, optimization module, Little Endian Code generation and data movement RTL (register transfer language). Double precision floating point arithmetic support.
• Ported GNU toolchains for DRDO's ANUPAMA (32bit RISC processors). Designed & Debeloped ABI, optimization module, Little Endian Code generation and data movement RTL (register transfer language). Double precision floating point arithmetic support.

May 2001 – Jan 2003 · 1 yr 8 mos

• C54ToTeaklite is a C54x assembly code to Teaklite assembly converter s/w. Algorithms and programs written in C54x assembly is directly converted into Teaklite assembly, while preserving the logic and emitting optimized code with 1:1.03 cycle ratios. In this project, my role was to design the bit reversal module, double word instruction correction, and macro handling.
• C54ToTeak is a C54x assembly code to Teak assembly converter s/w. Algorithms and programs written in C54x assembly is directly converted into Teak assembly, while preserving the logic and emitting optimized code with 1:1.02 cycle ratios. In this project, my role was to design ABI, taking care of Scheduling, optimization, BIT reversal addressing mode and Endianness correcting module