Subramanian Mathesh

Product Manager

Bengaluru, Karnataka, India14 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Embedded Systems and FPGA design.
  • Proven track record in test plan preparation and hardware design.
  • Strong background in PCB design and ATE testing.
Stackforce AI infers this person is a skilled engineer in the semiconductor and embedded systems industry.

Contact

Skills

Core Skills

Embedded SystemsFpgaTest Plan PreparationPcb Test Hardware Circuit DesignPcb DesignFpga Logic Design

Other Skills

XilinxHardwareMicrocontrollersTest debuggingCharacterizationData collection & analysisEmbedded DesignSchematic DesignVHDLSchematic CaptureCETS364ASL1000 TesterAllegroAtmel AVR

Experience

14 yrs 7 mos
Total Experience
3 yrs 7 mos
Average Tenure
4 yrs 1 mo
Current Experience

Intel corporation

IOTG Product Development Engineer

Apr 2022Present · 4 yrs 1 mo · Bengaluru, Karnataka, India

Embedded SystemsFPGAXilinxHardwareMicrocontrollers

Tessolve semiconductor pvt. ltd.

ATE Test Engineer

Apr 2015Mar 2022 · 6 yrs 11 mos · Bengaluru, Karnataka, India

Chip test engineering ltd

ATE TEST ENGINEER

Jun 2014Mar 2015 · 9 mos · Chennai

  •  Test product datasheet & feasibility study.
  •  Analyzing tester platform to be involved with respect to the device/test measurement
  • requirement.
  •  Bringing up action plan for Test development, Hardware design & Release to production.
  •  Test Plan preparation by studying product datasheet.
  •  Designing PCB Test Hardware circuit for the required ATE systems.
  •  Handled Hardware design for various mixed signal, Digital & Analog products.
  •  Preliminary drafting of Test Hardware Schematic with Or cad tools.
  •  Verification of the Test hardware resource allocation, Placement, Layout and Gerber using
  • various data tools.
  •  Bill of Materials preparation, ordering & tracking receipt of required test components.
  •  Studying the product, understanding customer requirement, developing Test plan & execution.
  •  Test debugging based on the test plan generated with the ATE systems.
  •  Repeatability, Spike verification, Failure simulation, Correlation, and Test Time reduction.
  •  Characterization, data collection & analysis.
  •  Getting feedback from customer about debug & Qualification activities.
  •  Maintaining Test Plan, Hardware and Test Debugging activities for ISO standards.
  •  Handled development of Single site test solution for Final test.
  •  Bench level verification of devices for debug support.
Test Plan preparationPCB Test Hardware circuit designTest debuggingCharacterizationData collection & analysis

Qmax test equipments pvt ltd

Hardware Engineer

Jul 2011May 2014 · 2 yrs 10 mos · Greater Chennai Area

  • PCB Design, FPGA Logic Design, Embedded Design, BOM Prepration,
  • Schematic Design using or cad.
PCB DesignFPGA Logic DesignEmbedded DesignSchematic Design

Education

Angel College of Engineering and Technology

Bachelor's degree — Electronics and communication Engineering

Jan 2007Jan 2011

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