Sunil Patil G R

Software Engineer

Karnataka, India6 yrs 9 mos experience

Key Highlights

  • Experienced in digital design and layout for advanced technologies.
  • Proficient in multiple EDA tools for design automation.
  • Strong background in synthesis and static timing analysis.
Stackforce AI infers this person is a skilled engineer in semiconductor design and EDA tools.

Contact

Skills

Other Skills

VerilogPerlCTCLSynopsys toolsCadence VirtuosoMentor Graphics

Experience

6 yrs 9 mos
Total Experience
1 yr 8 mos
Average Tenure
1 yr 6 mos
Current Experience

Synopsys inc

Staff Engineer

Nov 2024Present · 1 yr 7 mos · Bengaluru, Karnataka, India

Cadence design systems

Lead Design Engineer

Oct 2022Oct 2024 · 2 yrs · Bengaluru, Karnataka, India

Microchip technology inc.

Synthesis and STA Engineer

Nov 2020Oct 2022 · 1 yr 11 mos · Penang, Malaysia

Intel corporation

STA Engineer

Jul 2018Nov 2020 · 2 yrs 4 mos · Banglore

Stmicroelectronics

Technical Intern

Aug 2017Jun 2018 · 10 mos · Noida Area, India

  • Worked on digital layout designing (28nm &40nm)

Education

Vellore Institute of Technology

Master of Technology — Vlsi

Jan 2016Jan 2018

G M Institute of Technology

Bachelor's of Engineering

Jan 2011Jan 2015

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