Virendra Pratap Rathore — Software Engineer
Contributing to Digital Design for high-speed serial protocols such as PCIe and USB in the Serdes PHY IP Team
Stackforce AI infers this person is a Digital Design Engineer specializing in high-speed protocols and FPGA technologies.
Location: Jaipur, Rajasthan, India
Experience: 1 yr 9 mos
Skills
- Digital Design
- Fpga Design
Career Highlights
- Expertise in Digital Design for high-speed protocols.
- Hands-on experience with FPGA prototyping and RTL development.
- Strong foundation in DFT and digital image processing.
Work Experience
NVIDIA
Physical Design Engineer (4 mos)
Synopsys Inc
ASIC Digital Design Engineer (9 mos)
Graduate Engineering Trainee (8 mos)
3rdiTech Inc.
Hardware Engineer Intern(RTL/FPGA Team) (5 mos)
Education
Bachelor of Technology - BTech at Thapar Institute of Engineering & Technology
at Kendriya Vidyalaya
