Viswanath Kuppireddy

CTO

Bengaluru, Karnataka, India13 yrs 6 mos experience

Most Likely To SwitchAI Enabled

Key Highlights

Expert in CPU performance architecture and validation.
Strong track record in performance analysis and problem-solving.
Collaborated with multinational teams on cutting-edge technologies.

Stackforce AI infers this person is a Semiconductor Performance Architect with expertise in CPU architecture and validation.

Contact

Skills

Core Skills

Computer ArchitecturePerformance Engineering

Other Skills

X86SpecmanMicroarchitectureSystem ArchitectsTableauPerformance analysisArchitecture analysisProblem solvingCustomer orientedSystem specificationGood decision making skillsAdvanced programming skillsAI-MLVerilogEmbedded Systems

About

An experienced creative Engineer, good team player, analyst and architect for hardware and Software systems. With the strong track record of computer architecture knowledge along with advanced programming skills ranging from C to python, analysing performance of cutting edge processors, developing new methodologies in finding critical bugs within a short span of time. Experienced working with various multinational teams across the globe which includes from requirements gathering to CPU architects - RTL Designers - Verification - Backend - Validation till Marketing the product. Currently working on Core Internal Performance Validation on leading edge Big Cores at Intel Corporation, Bengaluru. Will be working closely with CPU architects in shaping the better tomorrow for the world as my contribution. Specialties: performance analysis, architecture analysis, problem solving, customer oriented, system specification, good decision making skills, advanced programming skills, AI-ML.

Experience

13 yrs 6 mos

Total Experience

4 yrs 6 mos

Average Tenure

7 yrs 7 mos

Current Experience

Intel corporation

2 roles

CPU Performance Architect

Promoted

Apr 2024 – Present · 2 yrs 1 mo

X86Computer Architecture

CPU validation performance lead

Sep 2018 – Mar 2024 · 5 yrs 6 mos

Performing activities related to Performance and Validation on leading edge cores

SpecmanMicroarchitecturePerformance Engineering

Arm

2 roles

System Performance analysis Engineer

Promoted

Jul 2015 – Sep 2018 · 3 yrs 2 mos · Bengaluru Area, India

1. System performance analysis and bottleneck analysis for various workloads like micros, Industry baremetal benchmarks on upcoming mobile platform and root causing the issue to the IP level and suggesting changes in the RTL for better performance.
2. Collaborating with ARM's design teams to shape our next-generation IP's through a workload-driven methodology.
3. Responsible for maintaining result database and showcasing existing data using tableau software to the marketing teams, Various internal and external IP teams.

System ArchitectsPerformance Engineering

Graduate Engineer

Nov 2013 – Jun 2015 · 1 yr 7 mos · Bengaluru Area, India

My Responsibilities as Graduate engineer included,
1. Being a Graduate engineer in the Performance Analysis and Benchmarking team I was focusing on the performance measurement and analysis of multi-cluster-CPU and CPU-memory paths. I was working closely with the IP architects at ARM with the goal for maximizing performance that our customers can reach with our IP.
2. The performance analysis work requires an understanding of how the overall performance is established from different parts of the system. Was focusing on the hardware and software aspects of the system. I was responsible for collaborating with the experts in different areas, collecting relevant information and applying it to understand the performance limitations in the system, and exploring methods for optimizing performance.
3. Responsible for Creating infrastructure using Perl, Python, Shell Scripting, C. Understanding benchmarks, running regressions, plotting them against theoretical values and debugging using fsdb waves. Responsible for IP integration using Verilog.

Intel corporation

Intern-technical

Aug 2012 – Oct 2013 · 1 yr 2 mos · Bengaluru Area, India

First 5 months, worked on DC-compiler to generate a netlist from RTL Verilog and on IC-compiler to generate GDS-II , ASCII formats from a synthesised gate level netlist.
Later 10months worked on pre and post-silicon validation. Reponsible for running regressions, writing infrastructure scripts using Perl and Python languages. Worked on performance validation by writing perfchecker rules. Exposure to the performance validation process from RTL to perfchecker rules.
Able to create a Visual Basic tool, which is responsible for showing events for each IP when ever you hover mouse on top of them.