Dec 2015 – Feb 2025 · 9 yrs 2 mos · Greater Hyderabad Area

• Freescale and NXP merged to become one of the world's largest semiconductor companies.
• 5G RedCap New SoC Development:
• Managed a 10-member team overseeing BSP and RF software development for current and upcoming 5G CPE SoCs.
• Architected BSP requirements, benchmarking, and RF infrastructure architecture (FR1 & FR2) for NXP’s upcoming RedCap RT-5G SoC.
• 5G NR CPE SoC for Reliance Jio and Verizon:
• Designed and implemented RF infrastructure (FR1 & FR2).
• Developed USIM controller drivers for modem-side 5G CPE NSA mode and created USIM libraries for NAS Layer per ETSI TS standards.
• UEFI Support for Network Subsystems:
• Integrated UEFI support for DPAA2 in NXP LX2160A for Microsoft/SolidRun and contributed to upstreaming UEFI/ACPI support in Linux and edk2.
• Enabled on-the-fly network configuration for SBSA-compliant devices, receiving the Bravo Team Award for UEFI contributions.

May 2014 – Dec 2015 · 1 yr 7 mos · Hyderabad, India

• Freescale Acquired Mindspeed ARM Processor Business.
• Freescale’s LayerScape CPE Gateway Development:
• Conceptualized and led platform software development for ARMv8 (Cortex A54)-based SoCs with data path acceleration using Imagination’s PFE IP.
• Delivered comprehensive software including uBoot, Linux BSP (USB, PCI, QSPI, UART, SDHC, SDIO, WiFi, SAI, DMA, Power Management), and customer support through multiple phases.

Sep 2010 – May 2014 · 3 yrs 8 mos

• Power Management Subsystem:
• Architected and developed a power management framework supporting 4 power modes, including ultra-low-power hibernation and battery modes compliant with EU CPE standards.
• Device PM, runtime PM - CPU Freq, DVFS, CPU-Hotplug, Hibernation, PMU firmware (ARM-9 and PFE) dynamic bus frequency adjustment (AXI Freq), and selective wake-up features.
• Linux BSP Development and Bring-Up:
• Led chip bring-up with the latest Linux kernel for Mindspeed’s Comcerto-2000 chipset, coordinating cross-functional teams for driver development (USB, PCIe, SATA, Flash, I2C, UART, DMA, Flash Drivers (NAND, NOR, SPI etc) and customer delivery.
• Achieved awards for successful SoC bring-up, contributing to design wins shortly after tape-out.
• Boot Loader and Secure Boot Development
• Developed 3-stage bootloading systems (Barebox, uBoot) for Mindspeed’s Comcerto and Transcede chipsets with robust secure boot support using OTP and eFuse frameworks.
• Validated bootloaders and peripherals during pre- and post-silicon phases, achieving a zero-defect record for internal boot ROM software frameworks.

Feb 2010 – Jan 2011 · 11 mos

• NXP BU Home Merged With Trident Miocrosystem.
• Boot Loader Subsystem:
• Designed and developed a 3-stage bootloader for NXP’s ARM Cortex A9-based Set-Top-Box SoC, supporting multiple boot sources (NAND, NOR, SPI, Fast SPI, I2C, UART and SATA).
• Received the Team of the Quarter Award for outstanding contributions to subsystem development.

May 2008 – Mar 2010 · 1 yr 10 mos

• Part of the Broadband Media group of Conexant Systems which is acquired by NXP Semiconductors.
• Worked on new generation Complex IP STB's SoC's data path. Involved in Linux TCP/IP stack optimization, development of Bootloader, and low-level device drivers for the latest STB Soc of the NXP. Involved in pre- and post-silicon verification of the same.
• Ethernet Driver and Networking Optimization:
• Developed Linux Ethernet drivers and optimized the networking stack for NXP’s Set-Top-Box SoC by implementing zero-copy techniques.

May 2005 – Aug 2007 · 2 yrs 3 mos

• Network Processor (10-core SPARC-based) firmware development. Data plane (fast path) development (L2/L3) for networking products like DSLAM. Board diagnostics and device drivers. Contributed Largely on Data Path Design and Optimization.
• Network Processor Data Path Firmware Architecture:
• Performance Optimization by complete Re-architecture, Design & Development of
• Bare Metal (RISC Assembly) DSL sub-system of Conexant’s Columbia-X Network
• Processor-based D-SLAM Platform. Complete D-SLAM Data Path accelerator
• firmware running on 10-core RISC-based Network Processor is Re-architected and
• DSL sub-system (running on 4 cores) is designed from scratch, adding/optimizing
• features like DSL-Rx driver module (cell-based processing) and IRL (as part of DSL-Rx).
• module), DSL Tx Packet scheduler module (ORL and QoS as part of this), DSL Tx
• Cell scheduler modules, drivers for UTOPIOA and POS interfaces.
• Very high performance targets achieved with very high-quality firmware software
• deployed with many customers. Rx performance enhanced from 210 Mbps to 1.45
• Gbps. Tx performance enhanced from 790 Mbps to 1.9 Gbps. Symmetric (Tx + Rx)
• performance enhanced from 150 Mbps to 1.2 Gbps.

Dec 2004 – May 2005 · 5 mos

• Involved in development of L2 and L3 networking products like gateways and traffic aggregater between access network and WAN on Intel IXP 2400 Network processor Platform. Majorly Contributed on Data Plane (Fast Path) design and development.
• Involved in Proposal Writing for RFQs by clients for data-plane development projects especially based on intel IXP network processor.
• Lead the WiMax study group and published a white paper on implementation of WiMax BS on Intel IXP Network Processor.
• Intel IXP Network Processor Data Path:
• Design and Development of PWE3 (Pseudo Wire Emulation Edge to Edge)
• Microblock for ATM, Frame Relay and Ethernet on Intel IXP2800 Network
• Processor’s Microblock Framework (For Client Tell Labs, USA).

Aug 2003 – Dec 2004 · 1 yr 4 mos

• Logic Eastern researches, designs, and manufactures integration services-rich networking products.
• Involved in the development of products like Edge Router and B-RAS on Intel IXP 2800 Network Processor Platform. Majorly contributed on Data Plane (Fast Path) design and development. Also on Optical Add Drop MUX (data-plane, control plane and core components and device drivers).
• Intel IXP Network Processor Control Path:
• NAT/NAPT core component for Intel IXP Network Processor-based Edge Router.
• Design and development of SNMP agent with customized MIBs and its integration
• with the Netplane's agent software for standard MIBs