Adithya Pai — Software Engineer
•Top-level DV Planning and exposure with System Verilog •Model development using Verilog - AMS and WREAL •SPICE Macro-modeling using PSpice, SIMPLIS and TINA-TI
Stackforce AI infers this person is a skilled engineer in electronics and circuit design.
Location: Mangaluru, Karnataka, India
Experience: 7 yrs 6 mos
Career Highlights
- Expertise in System Verilog and Verilog-AMS.
- Proficient in SPICE Macro-modeling techniques.
- Strong foundation in electronics and programming.
Work Experience
KarMic Design Private Ltd
Design Engineer - 2 (2 yrs 2 mos)
Junior Engineer (4 yrs 5 mos)
Trainee (11 mos)
Education
Bachelor of Engineering (BE) at Canara Engineering College, BANTWAL
PCME at Canara PU College
at Canara High School(Main)