Joydeep Debnath — Software Engineer
Passionate Analog Design Engineer with experience in Bipolar CMOS, Deep Nwell and advanced technologies such as 5nm, 7nm, and 22nm FinFETs & ribbon FETs. Well-versed in low voltage (<1V) and mid/high voltage (up to 95V) design challenges. Proven experience in complete IP design, including LDOs, DC-DC Buck converters, Bandgap references, POR circuits, and Current sensing architectures.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog Circuit Design and Power Management.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 7 mos
Skills
- Analog Circuit Design
- Power Electronics
Career Highlights
- Expert in Analog Circuit Design and Power Management
- Proven track record in LDO and DC-DC converter design
- Hands-on experience with high voltage and low voltage challenges
Work Experience
Renesas Electronics
Senior Analog Design Engineer (1 yr 7 mos)
Intel Corporation
Analog Design Engineer (2 yrs)
Texas Instruments
Analog Design Engineer (9 mos)
Analog Engineer (1 yr 3 mos)
Analog Design Intern (1 mo)
Analog Validation Intern (1 mo)
Variable Energy Cyclotron Centre (VECC),Kolkata
Summer Intern 2018 (1 mo)
Training and Placement Cell ,NIT Agartala
Summer Intern 2017 (1 mo)
Education
Bachelor of Engineering - BE at Jadavpur University