Baliram Chaurasiya — Product Manager
As an Electrical Engineering graduate from the Indian Institute of Technology Dharwad, I have developed strong technical skills in FPGA design and verification. With experience working as an R&D Engineer at Logic Fruit Technology, I have gained expertise in RTL coding and the use of various design and verification tools, including Quartus, ModelSim, QuestaSim, and Vivado. I am also skilled in different protocols such as SPI, I2C, UART, PCIe, and AXI interface. My technical strengths include proficiency in computer languages such as VHDL, Verilog, TCL scripting, C++, MATLAB. My core skills include RTL design, Digital Systems Mathematics, and Data Analysis. In addition to my technical skills, I possess strong problem-solving and communication skills. I believe in delivering results that exceed expectations and thrive in collaborative environments.
Stackforce AI infers this person is a skilled FPGA Engineer with a focus on digital design and verification in the tech industry.
Location: Gurugram, Haryana, India
Experience: 4 yrs 7 mos
Skills
- Rtl Design
- Digital Designs
- Analog Design
Career Highlights
- Strong expertise in FPGA design and verification.
- Proficient in multiple programming languages including VHDL and Verilog.
- Demonstrated ability to exceed expectations in collaborative environments.
Work Experience
Logic Fruit Technologies
Module Lead - FPGA (1 yr 11 mos)
R & D Engineer - FPGA (2 yrs 8 mos)
R & D Intern - FPGA (4 mos)
Chegg Inc.
Chegg Expert (2 yrs)
Education
B. Tech - Bachelor of Technology at Indian Institute of Technology, Dharwad
Intermediate(UP Board) at Shri Ram Rekha Singh Inter college Uruwa Bazar Gorakhpur
High School(UP Board) at Shri Ram Rekha Singh Inter College Uruwa Bazar Gorakhpur
